IP-AGX-PCIE/1 Altera, IP-AGX-PCIE/1 Datasheet - Page 272
![IP CORE - X1 Lane PCI Express For Arria GX](/photos/24/19/241936/4696145_sml.jpg)
IP-AGX-PCIE/1
Manufacturer Part Number
IP-AGX-PCIE/1
Description
IP CORE - X1 Lane PCI Express For Arria GX
Manufacturer
Altera
Datasheet
1.IP-AGX-PCIE1.pdf
(362 pages)
Specifications of IP-AGX-PCIE/1
Software Application
IP CORE, Interface And Protocols, PCI
Supported Families
Arria GX, Cyclone II, HardCopy II, Stratix II
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Lead Free Status / RoHS Status
na
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15–44
Table 15–39. Log Messages Using VHDL Constants - Subtype Natural
PCI Express Compiler User Guide
EBFM_MSG_DEBUG
EBFM_MSG_INFO
EBFM_MSG_WARNING
EBFM_MSG_ERROR_INFO
EBFM_MSG_ERROR_CONTINUE
EBFM_MSG_ERROR_FATAL
EBFM_MSG_ERROR_FATAL_TB_ERR
Constant (Message Type)
All of these log message constants are VHDL subtype natural or type integer for
Verilog HDL.
ebfm_display VHDL Procedure or Verilog HDL Function
The ebfm_display procedure or function displays a message of the specified type to
the simulation standard output and also the log file if ebfm_log_open is called.
A message can be suppressed, simulation can be stopped or both based on the default
settings of the message type and the value of the bit mask when each of the
procedures listed below is called. You can call one or both of these procedures based
on what messages you want displayed and whether or not you want simulation to
stop for specific messages.
■
When ebfm_log_set_suppressed_msg_mask is called, the display of the message
might be suppressed based on the value of the bit mask.
Specifies debug messages.
Specifies informational messages,
such as configuration register
values, starting and ending of
tests.
Specifies warning messages, such
as tests being skipped due to the
specific configuration.
Specifies additional information for
an error. Use this message to
display preliminary information
before an error message that stops
simulation.
Specifies a recoverable error that
allows simulation to continue. Use
this error for data miscompares.
Specifies an error that stops
simulation because the error leaves
the testbench in a state where
further simulation is not possible.
Used for BFM test driver or root
port BFM fatal errors. Specifies an
error that stops simulation because
the error leaves the testbench in a
state where further simulation is
not possible. Use this error
message for errors that occur due
to a problem in the BFM test driver
module or the root port BFM, that
are not caused by the endpoint
application layer being tested.
Description
0
1
2
3
4
N/A
N/A
Bit No
Mask
No
Yes
Yes
Yes
Yes
Yes
Cannot
suppress
Y
Cannot
suppress
by Default
Display
Chapter 15: Testbench and Design Example
December 2010 Altera Corporation
No
No
No
No
No
Yes
Cannot
suppress
Y
Cannot
suppress
Simulation
BFM Procedures and Functions
Stops by
Default
DEBUG:
INFO:
WARNING:
ERROR:
ERROR:
FATAL:
FATAL:
Message
Prefix
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