IP-AGX-PCIE/1 Altera, IP-AGX-PCIE/1 Datasheet - Page 354
![IP CORE - X1 Lane PCI Express For Arria GX](/photos/24/19/241936/4696145_sml.jpg)
IP-AGX-PCIE/1
Manufacturer Part Number
IP-AGX-PCIE/1
Description
IP CORE - X1 Lane PCI Express For Arria GX
Manufacturer
Altera
Datasheet
1.IP-AGX-PCIE1.pdf
(362 pages)
Specifications of IP-AGX-PCIE/1
Software Application
IP CORE, Interface And Protocols, PCI
Supported Families
Arria GX, Cyclone II, HardCopy II, Stratix II
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Lead Free Status / RoHS Status
na
- Current page: 354 of 362
- Download datasheet (7Mb)
Info–2
PCI Express Compiler User Guide
July 2010
July 2010
Date
Version
10.0
10.0
■
■
■
■
■
■
■
■
■
■
■
■
■
■
■
Added support for Stratix V GX and GT devices.
Added 2 new variants:
■
■
Added parity protection in Stratix V GX devices.
Added speed grade information for Cyclone IV GX and included a second entry for
Cyclone IV GX running at 62.5 MHz in
Clarified qword alignment for request and completion TLPs for Avalon-ST interfaces.
Added table specifying the Total RX buffer space, the RX Retry buffer size and Maximum
payload size for devices that include the hard IP implementation.
Recommended that designs specify may eventually target the HardCopy IV GX device,
specify this device as the PHY type to ensure compatibility.
Improved definitions for hpg_ctrler signal. This bus is only available in root port mode. In
the definition for the various bits, changed “This signal is” to “This signal should be.”
Removed information about Stratix GX devices. The PCI Express Compiler no longer
supports Stratix GX.
Removed appendix describing test_in/test_out bus. Supported bits are described in
Chapter 5, IP Core
Moved information on descriptor/data interface to an appendix. This interface is not
recommended for new designs.
Clarified use of tx_cred for non-posted, posted, and completion TLPs.
Corrected definition of Receive port error in
Removed references to the PCI Express Advisor. It is no longer supported.
Reorganized entire User Guide to highlight more topics and provide a complete walkthough
for the variants created using the MegaWizard Plug-In Manage design flow.
Support for an integrated PCI Express hard IP endpoint that includes all of the reset and
calibration logic.
Support for a basic PCI Express completer-only endpoint with fixed transfer size of a
single dword. Removed recommended frequencies for calibration and reconfiguration
clocks. Referred reader to appropriate device handbook.
Interfaces.
Changes Made
Table 1–9 on page
Table 12–2 on page
1–14.
December 2010 Altera Corporation
12–2.
Additional Information
Revision History
SPR
Related parts for IP-AGX-PCIE/1
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![IP-AGX-PCIE/4](/photos/24/19/241936/4696145_tmb.jpg)
Part Number:
Description:
IP CORE - PCI Express X1 And X4 Lanes For Arria GX
Manufacturer:
Altera
Datasheet:
![DK-CYCII-2C20N](/photos/9/20/92074/mfgdk-cycii-2c20nboard_tmb.jpg)
Part Number:
Description:
CYCLONE II STARTER KIT EP2C20N
Manufacturer:
Altera
Datasheet:
![EP610PC-35](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 35 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
![EP610PC-15](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 15 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
![EP610IPC-25](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
![EP610PC-30](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 30 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-10](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-7](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 7ns
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-12](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Classic EPLD
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-10A](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
![P85C224-66](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
![EP320PC](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
![EP2A15B724C7](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet: