ATA6603-EK Atmel, ATA6603-EK Datasheet - Page 152
ATA6603-EK
Manufacturer Part Number
ATA6603-EK
Description
MCU, MPU & DSP Development Tools Demoboard LIN-MCM
Manufacturer
Atmel
Datasheet
1.ATA6603P-PLQW.pdf
(360 pages)
Specifications of ATA6603-EK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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ATA6602/ATA6603
Figure 4-51
frequency correct PWM mode the OCR1x Register is updated at BOTTOM. The timing diagrams
will be the same, but TOP should be replaced by BOTTOM, TOP-1 by BOTTOM+1 and so on.
The same renaming applies for modes that set the TOV1 Flag at BOTTOM.
Figure 4-51. Timer/Counter Timing Diagram, no Prescaling
Figure 4-52
Figure 4-52. Timer/Counter Timing Diagram, with Prescaler (f
(PC and PFC PWM)
(PC and PFC PWM)
(CTC and FPWM)
and ICFn (if used
(CTC and FPWM)
(Update at TOP)
and ICFn (if used
(Update at TOP)
TOVn (FPWM)
TOVn (FPWM)
as TOP)
(clk
shows the count sequence close to TOP in various modes. When using phase and
shows the same timing data, but with the prescaler enabled.
as TOP)
OCRnx
(clk
TCNTn
TCNTn
OCRnx
TCNTn
TCNTn
clk
I/O
clk
clk
I/O
clk
/8)
I/O
Tn
/1)
I/O
Tn
TOP - 1
TOP - 1
TOP - 1
TOP - 1
Old OCRnx Value
Old OCRnx Value
TOP
TOP
TOP
TOP
clk_I/O
BOTTOM
BOTTOM
TOP - 1
TOP - 1
New OCRnx Value
/8)
New OCRnx Value
BOTTOM + 1
BOTTOM + 1
4921E–AUTO–09/09
TOP - 2
TOP - 2
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