ATA6603-EK Atmel, ATA6603-EK Datasheet - Page 263
ATA6603-EK
Manufacturer Part Number
ATA6603-EK
Description
MCU, MPU & DSP Development Tools Demoboard LIN-MCM
Manufacturer
Atmel
Datasheet
1.ATA6603P-PLQW.pdf
(360 pages)
Specifications of ATA6603-EK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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4.21
4.21.1
4921E–AUTO–09/09
Analog-to-Digital Converter
Features
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The ATA6602/ATA6603 features a 10-bit successive approximation ADC. The ADC is con-
nected to an 8-channel Analog Multiplexer which allows eight single-ended voltage inputs
constructed from the pins of Port A. The single-ended voltage inputs refer to 0V (GND).
The ADC contains a Sample and Hold circuit which ensures that the input voltage to the ADC is
held at a constant level during conversion. A block diagram of the ADC is shown in
on page
The ADC has a separate analog supply voltage pin, AV
0.3V from V
pin.
Internal reference voltages of nominally 1.1V or AV
ence may be externally decoupled at the AREF pin by a capacitor for better noise performance.
The Power Reduction ADC bit, PRADC, in
be disabled by writing a logical zero to enable the ADC.
10-bit Resolution
0.5 LSB Integral Non-linearity
±2 LSB Absolute Accuracy
13 - 260 µs Conversion Time
Up to 15 kSPS at Maximum Resolution
6 Multiplexed Single Ended Input Channels
2 Additional Multiplexed Single Ended Input Channels (TQFP and QFN Package only)
Optional Left Adjustment for ADC Result Readout
0 - V
Selectable 1.1V ADC Reference Voltage
Free Running or Single Conversion Mode
Interrupt on ADC Conversion Complete
Sleep Mode Noise Canceler
CC
264.
ADC Input Voltage Range
CC
. See the paragraph
“ADC Noise Canceler” on page 270
“Power Reduction Register - PRR” on page 64
CC
are provided On-chip. The voltage refer-
CC
. AV
ATA6602/ATA6603
CC
must not differ more than ±
on how to connect this
Figure 4-100
must
263
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