ATA6603-EK Atmel, ATA6603-EK Datasheet - Page 54
ATA6603-EK
Manufacturer Part Number
ATA6603-EK
Description
MCU, MPU & DSP Development Tools Demoboard LIN-MCM
Manufacturer
Atmel
Datasheet
1.ATA6603P-PLQW.pdf
(360 pages)
Specifications of ATA6603-EK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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4.6.5
54
ATA6602/ATA6603
Low Frequency Crystal Oscillator
Table 4-9.
Notes:
The device can utilize a 32.768 kHz watch crystal as clock source by a dedicated Low Fre-
quency Crystal Oscillator. The crystal should be connected as shown in
When this Oscillator is selected, start-up times are determined by the SUT Fuses and CKSEL0
as shown in
Table 4-10.
Note:
Oscillator Source/
Power Conditions
Ceramic resonator, fast
rising power
Ceramic resonator, slowly
rising power
Ceramic resonator, BOD
enabled
Ceramic resonator, fast
rising power
Ceramic resonator, slowly
rising power
Crystal Oscillator, BOD
enabled
Crystal Oscillator, fast
rising power
Crystal Oscillator, slowly
rising power
Power Conditions
BOD enabled
Fast rising power
Slowly rising power
BOD enabled
Fast rising power
Slowly rising power
1. These options should only be used when not operating close to the maximum frequency of the
2. These options are intended for use with ceramic resonators and will ensure frequency stability
1. These options should only be used if frequency stability at start-up is not important for the
device, and only if frequency stability at start-up is not important for the application. These
options are not suitable for crystals.
at start-up. They can also be used with crystals when not operating close to the maximum fre-
quency of the device, and if frequency stability at start-up is not important for the application.
application.
Table
Start-up Times for the Full Swing Crystal Oscillator Clock Selection
Start-up Times for the Low Frequency Crystal Oscillator Clock Selection
4-10.
Start-up Time from
Start-up Time from
Power-down and
Power-down and
Reserved
Reserved
Power-save
Power-save
32K CK
258 CK
258 CK
16K CK
16K CK
16K CK
32K CK
32K CK
1K CK
1K CK
1K CK
1K CK
1K CK
1K CK
Additional Delay
Additional Delay
14CK + 4.1 ms
14CK + 4.1 ms
14CK + 4.1 ms
14CK + 65 ms
14CK + 65 ms
14CK + 65 ms
14CK + 4.1 ms
14CK + 4.1 ms
14CK + 65 ms
14CK + 65 ms
(V
(V
from Reset
from Reset
CC
CC
14CK
14CK
14CK
14CK
= 5.0V)
= 5.0V)
(2)
(1)
(1)
(2)
(1)
(1)
(2)
(1)
Figure 4-12 on page
CKSEL0
CKSEL0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
4921E–AUTO–09/09
SUT1..0
SUT1..0
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
51.
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