ATA6603-EK Atmel, ATA6603-EK Datasheet - Page 264
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ATA6603-EK
Manufacturer Part Number
ATA6603-EK
Description
MCU, MPU & DSP Development Tools Demoboard LIN-MCM
Manufacturer
Atmel
Datasheet
1.ATA6603P-PLQW.pdf
(360 pages)
Specifications of ATA6603-EK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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264
ATA6602/ATA6603
Figure 4-100. Analog to Digital Converter Block Schematic Operation
The ADC converts an analog input voltage to a 10-bit digital value through successive approxi-
mation. The minimum value represents GND and the maximum value represents the voltage on
the AREF pin minus 1 LSB. Optionally, AV
nected to the AREF pin by writing to the REFSn bits in the ADMUX Register. The internal
voltage reference may thus be decoupled by an external capacitor at the AREF pin to improve
noise immunity.
The analog input channel is selected by writing to the MUX bits in ADMUX. Any of the ADC input
pins, as well as GND and a fixed bandgap voltage reference, can be selected as single ended
inputs to the ADC. The ADC is enabled by setting the ADC Enable bit, ADEN in ADCSRA. Volt-
age reference and input channel selections will not go into effect until ADEN is set. The ADC
does not consume power when ADEN is cleared, so it is recommended to switch off the ADC
before entering power saving sleep modes.
AREF
ADC7
ADC6
ADC5
ADC4
ADC3
ADC2
ADC1
ADC0
AVCC
GND
INTERNAL 1.1V
REFERENCE
REFERENCE
BANDGAP
8-BIT DATA BUS
INPUT
MUX
ADC MULTIPLEXER
SELECT (ADMUX)
MUX DECODER
CC
or an internal 1.1V reference voltage may be con-
10-BIT DAC
ADC CTRL. & STATUS
REGISTER (ADCSRA)
ADC CONVERSION
COMPLETE IRQ
CONVERSION LOGIC
PRESCALER
SAMPLE and HOLD
COMPARATOR
15
+
-
ADC DATA REGISTER
(ADCH/ADCL)
ADC MULTIPLEXER
OUTPUT
4921E–AUTO–09/09
0
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