AT85C5122D-SISUM Atmel, AT85C5122D-SISUM Datasheet - Page 130
AT85C5122D-SISUM
Manufacturer Part Number
AT85C5122D-SISUM
Description
RFID Modules & Development Tools 3-5.5V Smart Card Reader
Manufacturer
Atmel
Datasheet
1.AT85C5122D-SISUM.pdf
(213 pages)
Specifications of AT85C5122D-SISUM
Product
RFID Readers
- Current page: 130 of 213
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Transmission (Mode 0)
Reception (Mode 0)
130
AT8xC5122/23
Figure 70. Serial I/O Port Block Diagram (Mode 0)
To start a transmission mode 0, write to SCON register clearing bits SM0, SM1.
As shown in Figure 71, writing the byte to transmit to SBUF register starts the transmis-
sion. Hardware shifts the LSB (D0) onto the RXD pin during the first clock cycle
composed of a high level then low level signal on TXD. During the eighth clock cycle the
MSB (D7) is on the RXD pin. Then, hardware drives the RXD pin high and asserts TI to
indicate the end of the transmission.
Figure 71. Transmission Waveforms (Mode 0)
To start a reception in mode 0, write to SCON register clearing SM0, SM1 and RI bits
and setting the REN bit.
As shown in Figure 72, Clock is pulsed and the LSB (D0) is sampled on the RXD pin.
The D0 bit is then shifted into the shift register. After eight sampling, the MSB (D7) is
shifted into the shift register, and hardware asserts RI bit to indicate a completed recep-
tion. Software can then read the received byte from SBUF register.
Figure 72. Reception Waveforms (Mode 0)
Write to SBUF
Write to SCON
SCON.6
SCON.1
M3 M2 M1 M0
SM1
Mode Decoder
TI
Controller
Mode
RXD
TXD
RXD
TXD
SCON.7
SCON.0
TI
RI
SM0
RI
Set REN, Clear RI
D0
D0
D1
CLOCK
D1
IBRG
CK_
T1
D2
D2
D3
D3
SBUF Tx SR
SBUF Rx SR
Baud Rate
Controller
D4
D4
D5
D5
D6
D6
D7
D7
4202E–SCR–06/06
RXD
TXD
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