AD9980KSTZ-80 Analog Devices Inc, AD9980KSTZ-80 Datasheet - Page 15

• Manufacturer Part Number: AD9980KSTZ-80
• Description: IC,Data Acquisition Signal Conditioner,3-CHANNEL,8-BIT,CMOS,QFP,80PIN,PLASTIC
• Manufacturer: Analog Devices Inc

Specifications of AD9980KSTZ-80

• Applications: Video
• Interface: Analog
• Voltage - Supply: 3.13 V ~ 3.47 V
• Package / Case: 80-LQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9980/PCBZ - KIT EVALUATION AD9980
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Sync Processing
The inputs of the sync processing section of the AD9980 are
combinations of digital Hsyncs and Vsyncs, analog sync-on-
green, or sync-on-Y signals, and an optional external Coast
signal. From these signals it generates a precise, jitter-free (9%
or less at 95 MHz) clock from its PLL; an odd-/even-field signal;
Hsync and Vsync out signals; a count of Hsyncs per Vsync; and
a programmable SOG output. The main sync processing blocks
are the sync slicer, sync separator, Hsync filter, Hsync regen-
erator, Vsync filter, and Coast generator.
The sync slicer extracts the sync signal from the green graphics
or luminance video signal that is connected to the SOGIN input
and outputs a digital composite sync. The sync separator’s task
is to extract Vsync from the composite sync signal, which can
come from either the sync slicer or the Hsync input. The Hsync
filter is used to eliminate any extraneous pulses from the Hsync
or SOGIN inputs, outputting a clean, low-jitter signal that is
appropriate for mode detection and clock generation. The
Hsync regenerator is used to recreate a clean, although not low
HSYNC0
HSYNC1
VSYNC0
VSYNC1
SOGIN0
SOGIN1
COAST
ACTIVITY
ACTIVITY
ACTIVITY
ACTIVITY
DETECT
DETECT
DETECT
DETECT
AD9980
SLICER
SLICER
SYNC
SYNC
POLARITY
POLARITY
POLARITY
POLARITY
ACTIVITY
ACTIVITY
DETECT
DETECT
DETECT
DETECT
DETECT
DETECT
Figure 8. Sync Processing Block Diagram
MUX
MUX
MUX
CHANNEL
SELECT
Rev. 0 | Page 15 of 44
VSYNC FILTER
PROCESSOR
MUX
SYNC
AND
SELECT
HSYNC
MUX
COAST
jitter, Hsync signal that can be used for mode detection and
counting Hsyncs per Vsync. The Vsync filter is used to elimi-
nate spurious Vsyncs, maintain a stable timing relationship
between the Vsync and Hsync output signals, and generate the
odd/even field output. The Coast generator creates a robust
Coast signal that allows the PLL to maintain its frequency in
the absence of Hsync pulses.
Sync Slicer
The purpose of the sync slicer is to extract the sync signal from
the green graphics or luminance video signal that is connected
to the SOGIN input. The sync signal is extracted in a two step
process. First, the SOG input is clamped to its negative peak,
(typically 0.3 V below the black level). Next, the signal goes to a
comparator with a variable trigger level (set by Register 0x1D,
Bits [7:3]), but nominally 0.128 V above the clamped level. The
sync slicer output is a digital composite sync signal containing
both Hsync and Vsync information (see Figure 9).
HSYNC
HSYNC/VSYNC
REG 26H, 27H
GENERATOR
PLL CLOCK
COUNTER
FILTERED
HSYNC
REGENERATOR
HSYNC FILTER
AND
REGENERATED
HSYNC
MUX
SET POLARITY
SET POLARITY
SET POLARITY
SET POLARITY
VSYNCOUT
DATACK
SOGOUT
VSYNCOUT
ODD/EVEN
FIELD
AD9980