AD9980KSTZ-80 Analog Devices Inc, AD9980KSTZ-80 Datasheet - Page 21

IC,Data Acquisition Signal Conditioner,3-CHANNEL,8-BIT,CMOS,QFP,80PIN,PLASTIC

AD9980KSTZ-80

Manufacturer Part Number
AD9980KSTZ-80
Description
IC,Data Acquisition Signal Conditioner,3-CHANNEL,8-BIT,CMOS,QFP,80PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9980KSTZ-80

Applications
Video
Interface
Analog
Voltage - Supply
3.13 V ~ 3.47 V
Package / Case
80-LQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD9980/PCBZ - KIT EVALUATION AD9980
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD9980KSTZ-80
Manufacturer:
ADI
Quantity:
830
Part Number:
AD9980KSTZ-80
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Part Number:
AD9980KSTZ-80
Manufacturer:
ADI/亚德诺
Quantity:
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Mode Descriptions
Table 11. Output Formats
Port
Bit
4:4:4
4:2:2
4:4:4 DDR
1
2
For 4:2:2 modes the first item in the list is the first pixel after Hsync.
Arrows in the table indicate clock edge. Rising edge of clock = ↑, falling edge = ↓.
1
4:4:4—All channels come out with their 8 data bits at the
same time. Data is aligned to the negative edge of the clock
for easy capture. This is the normal 24-bit output mode for
RGB or 4:4:4 YCbCr.
4:2:2—Red and green channels contain 4:2:2 formatted
data (16 pins) with Y data on the green channel and Cb, Cr
data on the red channel. Data is aligned to the negative
edge of the clock. The blue channel contains the secondary
channel with Cb, Y, Cr, Y formatted DDR 4:2:2 data. The
data edges are aligned to both edges of the pixel clock, so
use of the 90° clock may be necessary to capture the
DDR data.
7
DDR ↑
6
2
G [3:0]
5
DDR ↓
4
Red/Cr
Cb, Cr
Red
2
R [7:0]
3
DDR ↑ B [7:4]
2
1
0
7
DDR ↑ B [3:0]
DDR ↓ G [7:4]
Rev. 0 | Page 21 of 44
6
5
Green/Y
4
Green
Y
3
N/A
N/A
4:4:4 DDR—This mode puts out full 4:4:4 data on 12 bits of
the red and green channels thus saving 12 pins. The first
half (RGB [11:0]) of the 24-bit data is sent on the rising
edge and the second half (RGB [23:12]) is sent on the
falling edge. The 4:2:2 DDR data is sent on the blue
channel, as in 4:2:2 mode.
RGB [23:0] = R [7:0] + G [7:0] + B [7:0], so RGB [23:12] =
R [7:0] + G [7:4] and RGB [11:0] = G [3:0] + B [7:0]
2
1
0
7
6
DDR 4:2:2 ↑ Cb, Cr ↓ Y, Y
5
DDR 4:2:2 ↑ Cb, Cr
DDR 4:2:2 ↓ Y, Y
Blue/Cb
4
Blue
3
2
AD9980
1
0

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