AD9980KSTZ-80 Analog Devices Inc, AD9980KSTZ-80 Datasheet - Page 36

• Manufacturer Part Number: AD9980KSTZ-80
• Description: IC,Data Acquisition Signal Conditioner,3-CHANNEL,8-BIT,CMOS,QFP,80PIN,PLASTIC
• Manufacturer: Analog Devices Inc

Specifications of AD9980KSTZ-80

• Applications: Video
• Interface: Analog
• Voltage - Supply: 3.13 V ~ 3.47 V
• Package / Case: 80-LQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9980/PCBZ - KIT EVALUATION AD9980
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9980
DETECTION STATUS
0x24
Table 60. Hsync0 Detection Results
Detect
0
1
0x24
Table 61. Hsync1 Detection Results
Detect
0
1
0x24
Table 62. Vsync0 Detection Results
Detect
0
1
0x24
Table 63. Vsync1 Detection Results
Detect
0
1
0x24
7
This bit is used to indicate when activity is detected on
the HSYNC0 input pin. If Hsync is held high or low,
activity will not be detected. The sync processing
block diagram shows where this function is imple-
mented. 0 = Hsync0 is not active. 1 = Hsync0 is active.
6
This bit is used to indicate when activity is detected on
the HSYNC1 input pin. If Hsync is held high or low,
activity is not detected. The sync processing block
diagram shows where this function is implemented.
0 = Hsync1 is not active. 1 = Hsync1 is active.
5
This bit is used to indicate when activity is detected on
the VSYNC0 input pin. If Vsync is held high or low,
activity is not detected. The sync processing block
diagram shows where this function is implemented.
0 = Vsync0 not active. 1 = Vsync0 is active.
4
This bit is used to indicate when activity is detected on
the Vsync1 input pin. If Vsync is held high or low,
activity is not detected. The sync processing block
diagram shows where this function is implemented.
0 = Vsync1 is not active, 1 = Vsync1 is active.
3
This bit is used to indicate when activity is detected on
the SOG0 input pin. If SOG is held high or low,
activity is not detected. The sync processing block
diagram shows where this function is implemented.
0 = SOG0 is not active. 1 = SOG1 is active.
Hsync0 Detection Bit
Hsync1 Detection Bit
Vsync0 Detection Bit
Vsync1 Detection Bit
SOG0 Detection Bit
Result
No activity detected
Activity detected
Result
No activity detected
Activity detected
Result
No activity detected
Activity detected
Result
No activity detected
Activity detected
Rev. 0 | Page 36 of 44
Table 64. SOG0 Detection Results
Detect
0
1
0x24
Table 65. SOG1 Detection Results
Detect
0
1
0x24
Table 66. COAST Detection Result
Detect
0
1
0x24
Table 67. Clamp Detection Results
Detect
0
1
POLARITY STATUS
0x25
Table 68. Detected Hsync0 Polarity Results
Detect
0
1
0x25
Table 69. Detected Hsync1 Polarity Results
Detect
0
1
2
This bit is used to indicate when activity is detected on
the SOG1 input pin. If SOG is held high or low,
activity is not detected. The sync processing block
diagram shows where this function is implemented.
0 = SOG1 not active. 1 = SOG1 is active.
1
This bit detects activity on the EXTCLK/EXTCOAST
pin. It indicates one of the two signals is active, but it
won’t indicate if it is EXTCLK or EXTCOAST. A dc
signal is not detected.
0
This bit is used to indicate when activity is detected on
the external clamp pin. If external clamp is held high
or low, activity is not detected.
7
Indicates the polarity of Hsync0 input.
6
Indicates the polarity of Hsync1 input.
Coast Detection Bit
Clamp Detection Bit
Hsync0 Polarity
Hsync1 Polarity
SOG1 Detection Bit
Preliminary Technical Data
Result
No activity detected
Activity detected
Result
No activity detected
Activity detected
Result
No activity detected
Activity detected
Result
No activity detected
Activity detected
Result
Hsync polarity is negative
Hsync polarity is positive
Result
Hsync polarity is negative
Hsync polarity is positive