ADUC7036CCPZ-RL Analog Devices Inc, ADUC7036CCPZ-RL Datasheet - Page 9

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ADUC7036CCPZ-RL

Manufacturer Part Number
ADUC7036CCPZ-RL
Description
Flash 96k ARM7 Dual 16-Bit ADC LIN I.C.
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet

Specifications of ADUC7036CCPZ-RL

Core Processor
ARM7
Core Size
16/32-Bit
Speed
20.48MHz
Connectivity
LIN, SPI, UART/USART
Peripherals
PSM, Temp Sensor, WDT
Number Of I /o
9
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 18 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 115°C
Package / Case
48-VFQFN Exposed Pad, CSP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Parameter
PACKAGE THERMAL SPECIFICATIONS
POWER REQUIREMENTS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
These numbers are not production tested but are guaranteed by design and/or characterization data at production release.
Valid for current ADC gain setting of PGA = 4 to 64.
These numbers include temperature drift.
Tested at gain range = 4; self-offset calibration removes this error.
Measured with an internal short after an initial offset calibration.
Measured with an internal short.
These numbers include internal reference temperature drift.
Factory-calibrated at gain = 1.
System calibration at a specific gain range (and temperature) removes the error at this gain range (and temperature).
Includes an initial system calibration.
Using ADC normal mode voltage reference.
Typical noise in low power modes is measured with chop enabled.
Voltage channel specifications include resistive attenuator input stage.
System calibration removes this error at the specified temperature.
RMS noise is referred to voltage attenuator input (for example, at f
Valid after an initial self-calibration.
In ADC low power mode, the input range is fixed at ±9.375 mV. In ADC low power plus mode, the input range is fixed at ±2.34375 mV.
It is possible to extend the ADC input range by up to 10% by modifying the factory set value of the gain calibration register or using system calibration. This approach
can also be used to reduce the ADC input range (LSB size).
Limited by minimum/maximum absolute input voltage range.
Valid for a differential input less than 10 mV.
Measured using box method.
The long-term stability specification is noncumulative. The drift in subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.
References of up to REG_AVDD can be accommodated by enabling an internal divide-by-2.
Die temperature.
Endurance is qualified to 10,000 cycles as per JEDEC Std. 22 Method A117 and measured at −40°C, +25°C, and +125°C. Typical endurance at 25°C is 170,000 cycles.
Retention lifetime equivalent at junction temperature (T
Low power oscillator can be calibrated against either the precision oscillator or the external 32.768 kHz crystal in user code.
These numbers are not production tested, but are supported by LIN compliance testing.
BSD electrical specifications, except high and low voltage levels, are per LIN 2.0 with pull-up resistor disabled and C
Specified after R
The MCU core is not shut down but interrupted, and high voltage I/O pins are disabled in response to a thermal shutdown event.
Thermal impedance can be used to calculate the thermal gradient from ambient to die temperature.
Internal regulated supply available at REG_DVDD (I
The specification listed is typical; additional supply current consumed during Flash/EE memory program and erase cycles is 7 mA and 5 mA, respectively.
to yield these input referred noise specifications/values.
Thermal Shutdown
Thermal Impedance (θ
Power Supply Voltages
Power Consumption
VDD (Battery Supply)
REG_DVDD, REG_AVDD
I
I
I
I
I
I
DD
DD
DD
DD
DD
DD
(Voltage/Temperature ADC)
(MCU Normal Mode)
(MCU Powered Down)
(MCU Powered Down)
(Current ADC)
(Precision Oscillator)
LIMIT
of 39 Ω.
1
, 31
JA
)
32
34
33
1
Test Conditions/Comments
48-lead LFCSP, stacked die
MCU clock rate = 10.24 MHz, ADC off
MCU clock rate = 20.48 MHz, ADC off (valid for
ADuC7036CCPZ and ADuC7036DCPZ only)
ADC low power mode, measured over the range of
T
ADC low power mode, measured over the range of
T
ADC low power plus mode, measured over the
range of T
conversion
Average current, measured with wake-up and
watchdog timer clocked from the low power
oscillator, T
Average current, measured with wake-up and
watchdog timer clocked from low power oscillator
over a range of T
A
A
= −10°C to +40°C, continuous ADC conversion
= −40°C to +85°C, continuous ADC conversion
SOURCE
J
A
= 5 mA), and REG_AVDD (I
) of 85°C as per JEDEC Std. 22 Method A117. Retention lifetime derates with junction temperature.
A
= −10°C to +40°C, continuous ADC
= −40°C to +85°C
A
= −10°C to +40°C
ADC
= 1 kHz, typical rms noise at the ADC input is 7.5 μV) and scaled by the attenuator (divide-by-24)
Rev. C | Page 9 of 132
SOURCE
= 1 mA).
Min
140
3.5
2.5
L
= 10 nF maximum.
Typ
150
45
2.6
10
20
300
300
520
120
120
1.7
0.5
400
Max
160
18
2.7
20
30
400
500
700
300
175
ADuC7036
°C
°C/W
V
V
mA
mA
μA
μA
μA
μA
μA
mA
mA
μA
Unit

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