ADUC7060BSTZ32 Analog Devices Inc, ADUC7060BSTZ32 Datasheet - Page 90

• Manufacturer Part Number: ADUC7060BSTZ32
• Description: DUAL 24-BIT AFE AND ARM 7 I.C
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7060BSTZ32

• Design Resources: 4 mA-to-20 mA Loop-Powered Temperature Monitor Using ADuC7060/1 (CN0145) Low power, Long Range, ISM Wireless Measuring Node (CN0164)
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 10MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 14
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.375 V ~ 2.625 V
• Data Converters: A/D 5x24b, 8x24b, D/A 1x14b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-LQFP
• Cpu Family: ADuC7xxx
• Device Core: ARM7TDMI
• Device Core Size: 16/32Bit
• Frequency (max): 10.24MHz
• Interface Type: I2C/SPI/UART
• Total Internal Ram Size: 4KB
• # I/os (max): 14
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 2.5V
• Operating Supply Voltage (max): 2.625V
• Operating Supply Voltage (min): 2.375V
• On-chip Adc: 2(4-chx24-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Package: 48LQFP
• Family Name: ADuC7xxx
• Maximum Speed: 10.24 MHz
• Operating Supply Voltage: 2.5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 14
• Number Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

ADuC7060/ADuC7061
I
Name:
Address:
Default value:
Access:
Function:
Table 101. I2CADR1 MMR in 10-Bit Address Mode
Bit
7:0
2
C Address 1, I2CADR1, Register
Name
I2CLADR
I2CADR1
0xFFFF091C
0x00
Read and write
This 8-bit MMR is used in 10-bit addressing
mode only. This register contains the least
significant byte of the address.
Description
These bits contain ADDR[7:0] in 10-bit
addressing mode.
Rev. B | Page 90 of 108
I
Name:
Address:
Default value:
Access:
Function:
Table 102. I2CDIV MMR Bit Designations
Bit
15:8
7:0
I
I
Name:
Address:
Default value:
Access:
Function:
2
2
2
C Slave Registers
C Master Clock Control, I2CDIV, Register
C Slave Control, I2CSCON, Register
Name
DIVH
DIVL
Description
These bits control the duration of the high
period of SCL.
These bits control the duration of the low period
of SCL.
I2CDIV
0xFFFF0924
0x1F1F
Read and write
This MMR controls the frequency of the I
clock generated by the master on to the SCL
pin. For further details, see the Serial Clock
Generation section.
I2CSCON
0xFFFF0928
0x0000
Read and write
This 16-bit MMR configures the I
in slave mode.
2
C peripheral
2
C