ISPPAC-CLK5620V-01TN100I Lattice, ISPPAC-CLK5620V-01TN100I Datasheet - Page 3

• Manufacturer Part Number: ISPPAC-CLK5620V-01TN100I
• Description: Clock Drivers & Distribution PROGRAMMABLE ZERO DELAY CL GEN
• Manufacturer: Lattice
• Type: Zero Delay Programmable PLL Clock Generatorr

Specifications of ISPPAC-CLK5620V-01TN100I

• Max Input Freq: 320 MHz
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Maximum Operating Temperature: + 85 C
• Package / Case: TQFP-100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Figure 2. ispClock5620 Functional Block Diagram
REFSEL
FBKSEL
FBKVTT
REFVTT
FBKA+
FBKB+
REFA+
REFB+
FBKA-
FBKB-
REFA-
REFB-
0
Profile Select
PS0
0
1
0
1
Control
1
PS1
2
DIVIDER
INPUT
(1-32)
3
(1-32)
M
N
FEEDBACK
DIVIDER
E
2
Configuration
DETECT
DETECT
PHASE
LOCK
LOCK
TDI
JTAG INTERFACE
TMS
RESET
TCK
FILTER
LOOP
TDO
PLL_BYPASS
VCO
3
SGATE
OUTPUT ENABLE CONTROLS
1
0
GOE
SKEW ADJUST
FEEDBACK
OEX
DIVIDERS
OUTPUT
(2-64)
(2-64)
(2-64)
(2-64)
(2-64)
V0
V1
V2
V3
V4
ispClock5600 Family Data Sheet
OEY
OUTPUT ROUTING
MATRIX
CONTROL
CONTROL
SKEW
SKEW
DRIVERS
DRIVERS
OUTPUT
OUTPUT
BANK_0A
BANK_0B
BANK_1A
BANK_1B
BANK_2A
BANK_2B
BANK_3A
BANK_3B
BANK_4A
BANK_4B
BANK_5A
BANK_5B
BANK_6A
BANK_6B
BANK_7A
BANK_7B
BANK_8A
BANK_8B
BANK_9A
BANK_9B