CY7C955-NC Cypress Semiconductor Corp, CY7C955-NC Datasheet - Page 37

• Manufacturer Part Number: CY7C955-NC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C955-NC

• Lead Free Status / RoHS Status: Not Compliant

REG
7
6
5
4
3
2
1
0
PSLI
This is the Path Signal Label (PSL) register interrupt bit. This bit resets when Reg 31H is being read.
0:
1:
LOPI
This is the Loss of Pointer (LOP) interrupt bit. This bit resets when Reg 31H is being read.
0:
1:
PAISI
This is the path Alarm Indication Signal (AIS) interrupt bit. This bit resets when Reg 31H is being read.
0:
1:
PRDII
This is the path Far-End Receive Failure (RDI) alarm interrupt bit. This bit resets when Reg 31H is being read.
0:
1:
BIPEI
This is the BIP 8 (B3) error interrupt bit. This bit resets when Reg 31H is being read.
0:
1:
FEBEI
This is the path Far-End Block Error (FEBE) interrupt bit. This bit resets when Reg 31H is being read.
0:
1:
BIT POSITION
No change in the path signal label since Reg 31H was last read.
There is a change in the path signal label since Reg 31H was last read.
No change in the loss of pointer state since Reg 31H was last read.
There is a change in the loss of pointer state since Reg 31H was last read.
No change in the path alarm indication signal since Reg 31H was last read.
There is a change in the path alarm indication signal since Reg 31H was last read.
No change in the path far-end receive failure alarm since Reg 31H was last read.
There is a change in the path far-end receive failure alarm since Reg 31H was last read.
No BIP 8 (B3) error detected since Reg 31H was last read.
BIP 8 (B3) error has been detected since Reg 31H was last read.
No path far-end block error detected since Reg 31H was last read.
Path far-end block error has been detected since Reg 31H was last read.
31H
Receive Path Overhead Processor Register
PSLI
Unused
LOPI
Unused
PAISI
PRDII
BIPEI
FEBEI
PRELIMINARY
NAME
37
R
R
R
R
R
R
READ/WRITE
CY7C955
DEFAULT