CY7C955-NC Cypress Semiconductor Corp, CY7C955-NC Datasheet - Page 49

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CY7C955-NC

Manufacturer Part Number
CY7C955-NC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C955-NC

Lead Free Status / RoHS Status
Not Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C955-NC
Manufacturer:
CY
Quantity:
33
Part Number:
CY7C955-NC
Manufacturer:
CYPRESS
Quantity:
784
REG
7
6
5
4
3
2
1
0
MGFC[3:0]
This is the mask for the Generic Flow Control register. A HIGH in any bit of this register unmasks the corresponding bit of
Reg 52H and allows it to be compared with the current ATM cell. If PASS (Reg 50H, bit 5) is LOW, ATM cells with VPI = 0, VCI
= 0, and other parts of their header matching all the unmasked bits of Reg 52H are dropped.
MPTI[2:0]
This is the mask for the Payload Type Indicator register. A HIGH in any bit of this register unmasks the corresponding bit of
Reg 52H and allows it to be compared with the current ATM cell. If PASS (Reg 50H, bit 5) is LOW, ATM cells with VPI = 0,
VCI = 0, and other parts of their header matching all the unmasked bits of Reg 52H are dropped.
MCLP
This is the mask for the Cell Loss Priority (CLP) register. A HIGH in any bit of this register unmasks the corresponding bit of
Reg 52H and allows it to be compared with the current ATM cell. If PASS (Reg 50H, bit 5) is LOW, ATM cells with VPI = 0, VCI
= 0, and other parts of their header matching all the unmasked bits of Reg 52H are dropped.
REG
7
6
5
4
3
2
1
0
CHCS[7:0]
Reg 54H and Reg 55H will load the number of correctable HCS errors from an internal counter approximately 200 ns after a
write operation is done to Reg 54H, Reg 55H, or Reg 00H. At that time (200 ns after the write operation), this register is
updated and the internal correctable HCS error counter is reset to zero to begin another round of error accumulation. Reading
Reg 54H and Reg–55H after the write yields the number of correctable HCS errors accumulated since the counter was last
reset, if overflow has not occurred.
BIT POSITION
BIT POSITION
53H
54H
Receive ATM Cell Processor Match Header Mask Register
MGFC[3]
MGFC[2]
MGFC[1]
MGFC[0]
MPTI[2]
MPTI[1]
MPTI[0]
MCLP
Receive ATM Cell Processor Correctable HCS Error Count Register
CHCS[7]
CHCS[6]
CHCS[5]
CHCS[4]
CHCS[3]
CHCS[2]
CHCS[1]
CHCS[0]
PRELIMINARY
NAME
NAME
49
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
R
READ/WRITE
READ/WRITE
0
0
0
0
0
0
0
0
CY7C955
DEFAULT
DEFAULT

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