L80223 LSI, L80223 Datasheet - Page 11

• Manufacturer Part Number: L80223
• Manufacturer: LSI

Specifications of L80223

• Lead Free Status / RoHS Status: Not Compliant

Figures
1.1
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
3.1
5.1
5.2
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
6.10
6.11
6.12
6.13
6.14
6.15
6.16
6.17
6.18
6.19
A.1
A.2
A.3
A.4
Top Level Block Diagram
L80227 Device Block Diagram
100BASE-TX and 10BASE-T Frame Format
MII Frame Format
TP Output Voltage Template
TP Input Voltage Template (10 Mbits/s)
Link Pulse Output Voltage Template (10 Mbits/s)
NLP vs FLP Link Pulse
SOI Output Voltage Template (10 Mbits/s)
Device Logic Diagram
MI Serial Port Frame Timing Diagram
MI Serial Frame Structure
25 MHz Output Timing
Transmit Timing (100 Mbits/s)
Transmit Timing (10 Mbits/s)
Receive Timing, Start of Packet (100 Mbits/s)
Receive Timing, End of Packet (100 Mbits/s)
Receive Timing, Start of Packet (10 Mbits/s)
Receive Timing, End of Packet (10 Mbits/s)
RX_EN Timing
Collision Timing, Receive (100 Mbits/s)
Collision Timing, Receive (10 Mbits/s)
Collision Timing, Transmit (100 Mbits/s)
Collision Timing, Transmit (10 Mbits/s)
Collision Test Timing
NLP Link Pulse Timing
FLP Link Pulse Timing
Jabber Timing
MI Serial Port Timing
L80227 64-Pin LQFP, Top View
64-Pin LQFP Package Drawing
Typical Network Interface Adapter Card Schematic Using
the L80227
Typical Switching Port Schematic Using L80227
Typical External PHY Schematic Using L80227
MII Output Driver Characteristics
Copyright © 2000, 2001, 2002 by LSI Logic Corporation. All rights reserved.
A-10
2-17
2-19
2-23
2-24
2-33
6-10
6-13
6-13
6-14
6-15
6-15
6-17
6-17
6-18
6-18
6-18
6-23
6-24
6-25
6-26
6-33
6-34
A-2
A-3
A-4
1-2
2-4
2-5
2-6
3-2
5-3
5-4
6-7
6-9
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