L80223 LSI, L80223 Datasheet - Page 37

• Manufacturer Part Number: L80223
• Manufacturer: LSI

Specifications of L80223

• Lead Free Status / RoHS Status: Not Compliant

2.3.8.2 10 Mbits/s TP Receiver
takes the three-level MLT3 encoded output data from the comparators
and converts it to normal digital data to be used for clock and data
recovery.
The 10 Mbits/s receiver detects input signals from the twisted-pair cable
that are within the template shown in
biased by internal resistors and go through a low-pass filter designed to
eliminate any high-frequency input noise. The output of the receive filter
goes to two different types of comparators: squelch and zero crossing.
The squelch comparator determines whether the signal is valid, and the
zero-crossing comparator senses the actual data transitions after the
signal is determined to be valid. The output of the squelch comparator
goes to the squelch circuit and is also used for link pulse detection, SOI
detection, and reverse polarity detection. The output of the zero-crossing
comparator is used for clock and data recovery in the Manchester
decoder.
Figure 2.5
Block Diagram Description
0
PW/4
0
585 mV sin (
585 mV sin (
585 mV sin[2
TP Input Voltage Template (10 Mbits/s)
Slope 0.5 V/ns
Slope 0.5 V/ns
Short Bit
Long Bit
Copyright © 2000, 2001, 2002 by LSI Logic Corporation. All rights reserved.
(t
t/PW)
t/PW)
PW2)/PW)]
3PW/4 PW
PW
3.1 V
585 mV
Figure
3.1 V
2.5. The TP inputs are
585 mV
2-19