PIC16F1847-I/SO Microchip Technology, PIC16F1847-I/SO Datasheet - Page 112

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PIC16F1847-I/SO

Manufacturer Part Number
PIC16F1847-I/SO
Description
14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core 18 S
Manufacturer
Microchip Technology
Datasheets

Specifications of PIC16F1847-I/SO

Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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PIC16(L)F1847
EXAMPLE 11-4:
DS41453A-page 112
; This row erase routine assumes the following:
; 1. A valid address within the erase block is loaded in ADDRH:ADDRL
; 2. ADDRH and ADDRL are located in shared data memory 0x70 - 0x7F
BCF
BANKSEL
MOVF
MOVWF
MOVF
MOVWF
BSF
BCF
BSF
BSF
MOVLW
MOVWF
MOVLW
MOVWF
BSF
NOP
NOP
BCF
BSF
ERASING ONE ROW OF PROGRAM MEMORY -
INTCON,GIE
EEADRL
ADDRL,W
EEADRL
ADDRH,W
EEADRH
EECON1,EEPGD
EECON1,CFGS
EECON1,FREE
EECON1,WREN
55h
EECON2
0AAh
EECON2
EECON1,WR
EECON1,WREN
INTCON,GIE
; Disable ints so required sequences will execute properly
; Load lower 8 bits of erase address boundary
; Load upper 6 bits of erase address boundary
; Point to program memory
; Not configuration space
; Specify an erase operation
; Enable writes
; Start of required sequence to initiate erase
; Write 55h
;
; Write AAh
; Set WR bit to begin erase
; Any instructions here are ignored as processor
; halts to begin erase sequence
; Processor will stop here and wait for erase complete.
; after erase processor continues with 3rd instruction
; Disable writes
; Enable interrupts
Preliminary
 2011 Microchip Technology Inc.

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