PIC16F1847-I/SO Microchip Technology, PIC16F1847-I/SO Datasheet - Page 214

• Manufacturer Part Number: PIC16F1847-I/SO
• Description: 14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core 18 S
• Manufacturer: Microchip Technology

Specifications of PIC16F1847-I/SO

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16(L)F1847
24.4
The enhanced PWM function described in this section is
available for CCP modules ECCP1 and ECCP2 with any
differences between modules noted.
The enhanced PWM mode generates a Pulse-Width
Modulation (PWM) signal on up to four different output
pins with up to 10 bits of resolution. The period, duty
cycle, and resolution are controlled by the following
registers:
• PRx registers
• TxCON registers
• CCPRxL registers
• CCPxCON registers
The ECCP modules have the following additional PWM
registers which control Auto-shutdown, Auto-restart,
Dead-band Delay and PWM Steering modes:
• CCPxAS registers
• PSTRxCON registers
• PWMxCON registers
The enhanced PWM module can generate the following
five PWM Output modes:
• Single PWM
• Half-Bridge PWM
• Full-Bridge PWM, Forward Mode
• Full-Bridge PWM, Reverse Mode
• Single PWM with PWM Steering Mode
FIGURE 24-5:
DS41453A-page 214
Note 1:
CCPRxH (Slave)
Duty Cycle Registers
Comparator
PWM (Enhanced Mode)
CCPRxL
PRx
TMRx
Comparator
The 8-bit timer TMRx register is concatenated with the 2-bit internal Q clock, or 2 bits of the prescaler to create the 10-bit time
base.
(1)
EXAMPLE SIMPLIFIED BLOCK DIAGRAM OF THE ENHANCED PWM MODE
Clear Timer,
toggle PWM pin and
latch duty cycle
DCxB<1:0>
R
S
PxM<1:0>
Q
Preliminary
PWMxCON
Controller
Output
2
CCPx/PxA
PxB
PxC
PxD
To select an Enhanced PWM Output mode, the PxM bits
of the CCPxCON register must be configured
appropriately.
The PWM outputs are multiplexed with I/O pins and are
designated PxA, PxB, PxC and PxD. The polarity of the
PWM pins is configurable and is selected by setting the
CCPxM bits in the CCPxCON register appropriately.
Figure 24-5
diagram of the Enhanced PWM module.
Figure 24-8
Enhanced PWM modes.
4
CCPxM<3:0>
Note 1: The corresponding TRIS bit must be
2: Clearing the CCPxCON register will
3: Any pin not used in the enhanced PWM
4: To
TRISx
TRISx
TRISx
TRISx
shows an example of a simplified block
cleared to enable the PWM output on the
CCPx pin.
relinquish control of the CCPx pin.
mode is available for alternate pin
functions, if applicable.
incomplete waveform when the PWM is
first enabled, the ECCP module waits
until the start of a new PWM period
before generating a PWM signal.
shows the pin assignments for various
prevent
 2011 Microchip Technology Inc.
the
CCPx/PxA
PxB
PxD
PxC
generation
of
an