PIC16F1847-I/SO Microchip Technology, PIC16F1847-I/SO Datasheet - Page 398

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PIC16F1847-I/SO

Manufacturer Part Number
PIC16F1847-I/SO
Description
14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core 18 S
Manufacturer
Microchip Technology
Datasheets

Specifications of PIC16F1847-I/SO

Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Part Number:
PIC16F1847-I/SO
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PIC16F1847-I/SO
0
PIC16(L)F1847
CCPR1L Register.......................................................... 34, 35
CCPTMRS0 Register ........................................................ 229
CCPxAS Register.............................................................. 230
CCPxCON (ECCPx) Register ........................................... 228
CLKRCON Register ............................................................ 72
Clock Accuracy with Asynchronous Operation ................. 298
Clock Sources
Clock Switching................................................................... 62
CMOUT Register............................................................... 173
CMxCON0 Register .......................................................... 172
CMxCON1 Register .......................................................... 173
Code Examples
Comparator
Comparator Module .......................................................... 165
Comparator Specifications ................................................ 371
Comparators
Compare Module. See Enhanced Capture/Compare/
CONFIG1 Register.............................................................. 48
CONFIG2 Register.............................................................. 50
CPSCON0 Register .......................................................... 325
CPSCON1 Register .......................................................... 326
Customer Change Notification Service ............................. 407
Customer Notification Service........................................... 407
Customer Support ............................................................. 407
D
DACCON0 (Digital-to-Analog Converter Control 0)
DACCON1 (Digital-to-Analog Converter Control 1)
Data EEPROM Memory .................................................... 105
Data Memory....................................................................... 21
DC and AC Characteristics ............................................... 379
DC Characteristics
Development Support ....................................................... 381
Device Configuration........................................................... 47
DS41453A-page 400
External Modes ........................................................... 55
Internal Modes ............................................................ 58
A/D Conversion ......................................................... 144
Changing Between Capture Prescalers .................... 206
Initializing PORTA ..................................................... 121
Initializing PORTB ..................................................... 126
Write Verify ............................................................... 115
Writing to Flash Program Memory ............................ 113
Associated Registers ................................................ 174
Operation .................................................................. 165
Cx Output State Versus Input Conditions ................. 168
C2OUT as T1 Gate ................................................... 181
PWM (ECCP)
Register..................................................................... 157
Register..................................................................... 157
Associated Registers ................................................ 118
Code Protection ........................................................ 106
Reading..................................................................... 106
Writing ....................................................................... 106
Extended and Industrial ............................................ 358
Industrial and Extended ............................................ 350
Code Protection .......................................................... 51
EC ....................................................................... 55
HS ....................................................................... 55
LP........................................................................ 55
OST..................................................................... 56
RC....................................................................... 57
XT ....................................................................... 55
HFINTOSC.......................................................... 58
Internal Oscillator Clock Switch Timing............... 60
LFINTOSC .......................................................... 59
MFINTOSC ......................................................... 58
Preliminary
Device Overview................................................. 11, 101, 104
Digital-to-Analog Converter (DAC) ................................... 153
E
ECCP/CCP. See Enhanced Capture/Compare/PWM
EEADR Registers ............................................................. 105
EEADRH Registers........................................................... 105
EEADRL Register ............................................................. 116
EEADRL Registers ........................................................... 105
EECON1 Register..................................................... 105, 117
EECON2 Register..................................................... 105, 118
EEDATH Register............................................................. 116
EEDATL Register ............................................................. 116
EEPROM Data Memory
Effects of Reset
Electrical Specifications .................................................... 347
Enhanced Capture/Compare/PWM (ECCP)..................... 205
Enhanced Mid-Range CPU ................................................ 17
Enhanced Universal Synchronous Asynchronous
Errata .................................................................................... 9
EUSART ........................................................................... 289
Configuration Word..................................................... 47
User ID ................................................................. 51, 52
Associated Registers ................................................ 158
Effects of a Reset ..................................................... 155
Specifications ........................................................... 371
Avoiding Spurious Write ........................................... 106
Write Verify ............................................................... 115
PWM mode ............................................................... 213
Enhanced PWM Mode.............................................. 214
Specifications ........................................................... 368
Receiver Transmitter (EUSART) .............................. 289
Associated Registers
Asynchronous Mode ................................................. 291
Baud Rate Generator (BRG)
Synchronous Master Mode............................... 310, 315
Auto-Restart ..................................................... 223
Auto-shutdown.................................................. 222
Direction Change in Full-Bridge Output Mode.. 220
Full-Bridge Application...................................... 218
Full-Bridge Mode .............................................. 218
Half-Bridge Application ..................................... 217
Half-Bridge Application Examples .................... 224
Half-Bridge Mode.............................................. 217
Output Relationships (Active-High and
Output Relationships Diagram.......................... 216
Programmable Dead Band Delay..................... 224
Shoot-through Current ...................................... 224
Start-up Considerations .................................... 225
Baud Rate Generator ....................................... 302
12-bit Break Transmit and Receive .................. 309
Associated Registers
Auto-Wake-up on Break ................................... 307
Baud Rate Generator (BRG) ............................ 301
Clock Accuracy................................................. 298
Receiver ........................................................... 294
Setting up 9-bit Mode with Address Detect ...... 296
Transmitter ....................................................... 291
Auto Baud Rate Detect..................................... 306
Baud Rate Error, Calculating............................ 301
Baud Rates, Asynchronous Modes .................. 303
Formulas........................................................... 302
High Baud Rate Select (BRGH Bit) .................. 301
Active-Low)............................................... 215
Receive .................................................... 297
Transmit.................................................... 293
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