SAA7103HV4 NXP Semiconductors, SAA7103HV4 Datasheet - Page 45

• Manufacturer Part Number: SAA7103HV4
• Manufacturer: NXP Semiconductors

Specifications of SAA7103HV4

• Adc/dac Resolution: 10b
• Screening Level: Commercial
• Package Type: PQFP
• Pin Count: 44
• Lead Free Status / RoHS Status: Compliant

Philips Semiconductors
SAA7102_SAA7103_4
Product data sheet
8.3 Slave receiver
Table 36:
[1]
[2]
Table 37:
Legend: * = default value after reset.
Code
S
Sr
1000 100X
A
Am
SUBADDRESS
DATA
--------
P
RAM ADDRESS
Bit
7 to 4 -
3 to 0 DACF[3:0] R/W
X is the read/write control bit; X = logic 0 is order to write; X = logic 1 is order to read.
If more than 1 byte of DATA is transmitted, then auto-increment of the subaddress is performed.
Symbol
[1]
Explanations of
Common DAC adjust fine register, subaddress 16h, bit description
[2]
Access Value Description
R/W
Description
START condition
repeated START condition
slave address
acknowledge generated by the slave
acknowledge generated by the master
subaddress byte
data byte
continued data bytes and acknowledges
STOP condition
start address for RAM access
Rev. 04 — 18 January 2006
0
0111
0110
0101
0100
0011
0010
0001
0000* 0 %
1000
1001
1010
1011
1100
1101
1110
1111
Figure 4
must be programmed with logic 0 to ensure compatibility to
future enhancements
DAC fine output voltage adjustment, 1 % steps for all DACs
7 %
6 %
5 %
4 %
3 %
2 %
1 %
0 %
−1 %
−2 %
−3 %
−4 %
−5 %
−6 %
−7 %
and
Figure 5
SAA7102; SAA7103
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Digital video encoder
45 of 84