SAA7103HV4 NXP Semiconductors, SAA7103HV4 Datasheet - Page 6

• Manufacturer Part Number: SAA7103HV4
• Manufacturer: NXP Semiconductors

Specifications of SAA7103HV4

• Adc/dac Resolution: 10b
• Screening Level: Commercial
• Package Type: PQFP
• Pin Count: 44
• Lead Free Status / RoHS Status: Compliant

Philips Semiconductors
SAA7102_SAA7103_4
Product data sheet
Table 4:
Symbol
V
SCL
SDA
FSVGC
VSVGC
PIXCLKI
PD3
PD2
PD1
PD0
PIXCLKO
CBO
HSVGC
TTX_SRES
TTXRQ_XCLKO2
VSM
HSM_CSYNC
RED_CR_C
GREEN_VBS_CVBS C7
V
BLUE_CB_CVBS
RSET
DUMP
V
XTALO
XTALI
DDD1
DDA1
SSA1
Pin description
Pin
LBGA156 QFP44
F4
E2
G2
G1
F1
F2
F3
H1
H2
H3
G4
G3
E3
C3
C4
D7
D8
C8
A10, B9,
C9, D9
C6
A9
A7, B7
A8, B8
A6
A5
Rev. 04 — 18 January 2006
…continued
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
Type
S
I(/O)
I/O
I/O
I/O
I
I
I
I
I
O
O
I/O
I
O
O
O
O
O
S
O
O
O
S
O
I
[1]
SAA7102; SAA7103
Description
digital supply voltage 1 (3.3 V for peripheral
cells)
serial clock input (I
output path
serial data input/output (I
frame synchronization output to Video
Graphics Controller (VGC) (optional input)
vertical synchronization output to VGC
(optional input)
pixel clock input (looped through)
MSB − 4 with C
see
MSB − 5 with C
see
MSB − 6 with C
see
MSB − 7 with C
see
pixel clock output to VGC
composite blanking output to VGC; active
LOW
horizontal synchronization output to VGC
(optional input)
teletext input or sync reset input
teletext request output or 13.5 MHz clock
output of the crystal oscillator
vertical synchronization output to monitor
(non-interlaced auxiliary RGB)
horizontal synchronization output to monitor
(non-interlaced auxiliary RGB) or composite
sync for RGB-SCART
analog output of RED or C
analog output of GREEN or VBS or CVBS
signal
analog supply voltage 1 (3.3 V for DACs)
analog output of BLUE or C
DAC reference pin; connected via 1 kΩ
resistor to analog ground (do not use
capacitor in parallel with 1 kΩ resistor)
DAC reference pin; connected via 12 Ω
resistor to analog ground
analog ground 1
crystal oscillator output
crystal oscillator input
Table 28
Table 28
Table 28
Table 28
[3]
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
to
to
to
to
[3]
[3]
B
B
B
B
Table 33
Table 33
Table 33
Table 33
-Y-C
-Y-C
-Y-C
-Y-C
2
C-bus) with inactive
Digital video encoder
R
R
R
R
4 : 2 : 2;
4 : 2 : 2;
4 : 2 : 2;
4 : 2 : 2;
2
for pin assignment
for pin assignment
for pin assignment
for pin assignment
C-bus)
R
B
or C signal
or CVBS signal
[3]
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