L-USS820D-DB LSI, L-USS820D-DB Datasheet - Page 41

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L-USS820D-DB

Manufacturer Part Number
L-USS820D-DB
Description
Manufacturer
LSI
Datasheet

Specifications of L-USS820D-DB

Operating Temperature (min)
-20C
Operating Temperature Classification
Commercial
Operating Temperature (max)
85C
Rad Hardened
No
Lead Free Status / RoHS Status
Compliant
Data Sheet, Rev. 7
September 2004
Agere Systems Inc.
Firmware Responsibilities for USB SETUP Commands
All SETUP commands are passed through from the USB host to the corresponding receive FIFO (assuming no
data transfer errors). Firmware must interpret and execute each command according to its USB definition.
Reception of a new SETUP command can be identified by the RXSETUP bit being set when a receive interrupt is
generated. Any old data in the receive FIFO is overwritten by a new SETUP command. The STOVW register bit is
set by hardware when a new SETUP packet is detected. When the complete SETUP packet has been written,
hardware resets the STOVW bit and sets the EDOVW bit. If either the STOVW or EDOVW bit is set, the effect of
any firmware actions on the FIFO pointers is blocked. This prevents the FIFO from underflowing as a result of firm-
ware attempting to read the FIFO while hardware is writing a new setup packet. Firmware must reset the EDOVW
bit, read the SETUP command from the FIFO, and then check the STOVW and EDOVW bits. If either is set, the
SETUP that was just read out is old and should be discarded. Firmware must then proceed with reading the new
SETUP command.
Firmware responsibilities for interpreting and executing USB standard commands are defined in Table 39.
Table 39. Firmware Responsibilities for USB SETUP Commands
GET_CONFIGURATION,
SET_CONFIGURATION,
SET/CLEAR_FEATURE
GET_DESCRIPTOR,
SET_DESCRIPTOR
GET_INTERFACE,
SET_INTERFACE
USB Command
SET_ADDRESS
GET_STATUS
For device status, firmware should write two data bytes to transmit FIFO 0, where bit
0 of byte 0 indicates if the device is self-powered, and bit 1 indicates if the remote
wake-up feature is supported (which should equal the value stored in the RWUPE
register bit).
For interface status, firmware should write two data bytes of zeros.
For endpoint status, firmware should write two data bytes to transmit FIFO 0, where
bit 0 of byte 0 is the RXSTL or TXSTL bit of the endpoint indicated by the SETUP
command.
For the DEVICE_REMOTE_WAKEUP feature, firmware should SET/RESET the
RWUPE register bit.
For the ENDPOINT_STALL feature, firmware should set/clear the RXSTL or TXSTL
register bit indicated by the SETUP command. Firmware must also handle all side
effects of these commands as documented in the USB specification, such as zeroing
an endpoint’s data toggle bit on CLEAR_FEATURE[stall].
Firmware should write the FADDR register with the device address indicated by the
SETUP command. This write must not occur until after the status stage of the control
transfer has completed successfully.
Firmware must maintain all information regarding which endpoints, interfaces, alter-
nate settings, and configurations are supported and/or currently enabled. The
enabled status of a particular endpoint direction, as specified by the current configura-
tion, interface, and alternate setting, must be indicated in the corresponding RXEPEN
or TXEPEN register bit. Firmware must also handle any side effects of these
commands as documented in the USB specification, such as zeroing an endpoint’s
stall and data toggle bits on SET_INTERFACE or SET_CONFIGURATION.
Firmware must maintain all information regarding all types of descriptors and write the
appropriate descriptor information to transmit FIFO 0 upon receiving
GET_DESCRIPTOR, or read the appropriate descriptor information from receive
FIFO 0 upon receiving SET_DESCRIPTOR.
Firmware Responsibility
USB Device Controller
USS-820D
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