FW82801DB S L66K Intel, FW82801DB S L66K Datasheet - Page 352
FW82801DB S L66K
Manufacturer Part Number
FW82801DB S L66K
Description
Manufacturer
Intel
Datasheet
1.FW82801DB_S_L66K.pdf
(587 pages)
Specifications of FW82801DB S L66K
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LPC Interface Bridge Registers (D31:F0)
9.8.2
9.8.2.1
9.8.2.2
352
Table 9-9. APM Register Map
APM_CNT—Advanced Power Management Control Port Register
APM I/O Decode
Table 9-9
the PCI Device 31: Function 0 space (APMDEC_EN), and cannot be moved (fixed I/O location).
I/O Address:
Default Value:
Lockable:
Power Well:
APM_STS—Advanced Power Management Status Port Register
I/O Address:
Default Value:
Lockable:
Power Well:
Address
Bit
7:0
Bit
7:0
B2h
B3h
Used to pass data between the OS and the SMI handler. Basically, this is a scratchpad register and
is not affected by any other register or function (other than a PCI reset).
shows the I/O registers associated with APM support. This register space is enabled in
Used to pass an APM command between the OS and the SMI handler. Writes to this port not only
store data in the APMC register, but also generates an SMI# when the APMC_EN bit is set.
Mnemonic
APM_CNT
APM_STS
B2h
00h
No
Core
00h
No
Core
B3h
Advanced Power Management Control Port
Advanced Power Management Status Port
Register Name
Description
Description
Attribute:
Size:
Usage:
Attribute:
Size:
Usage:
Intel
R/W
8 bit
Legacy Only
R/W
8 bit
Legacy Only
®
82801DB ICH4 Datasheet
Default
00h
00h
Type
R/W
R/W
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