FW82801DB S L66K Intel, FW82801DB S L66K Datasheet - Page 531

• Manufacturer Part Number: FW82801DB S L66K
• Manufacturer: Intel

Specifications of FW82801DB S L66K

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Intel
®
Table 17-11. Ultra ATA Timing (Mode 0, Mode 1, Mode 2)
82801DB ICH4 Datasheet
NOTES:
1. The specification symbols in parentheses correspond to the AT Attachment - 6 with Packet Interface
2. See the AT Attachment - 6 with Packet Interface (ATA/ATAPI - 6) Specification for further details on
Sym
t96a
t96b
t98a
t98b
t93
t94
t95
t97
t99
(ATA/ATAPI - 6) specification name.
measuring these timing parameters.
STROBE output released-to-
driving to the first transition
of critical timing (Tzfs)
Data Output Released-to-
Driving Until the First
Tunisian of Critical Timing
(Tdzfs)
Unlimited Interlock Time
(Tui)
Maximum time allowed for
output drivers to release
(from asserted or negated)
(Taz)
Minimum time for drivers to
assert or negate (from
released) (Tzad)
Ready-to-final-STROBE time
(no STROBE edges shall be
sent this long after negation
of DMARDY#) (Trfs)
Maximum time before
releasing IORDY (Tiordyz)
Minimum time before driving
IORDY (see Note 2)
(Tziordy)
Time from STROBE edge to
negation of DMARQ or
assertion of STOP (when
sender terminates a burst)
(Tss)
Parameter (1)
Mode 0 (ns)
Min
70
50
0
0
0
0
Max
10
75
20
Mode 1 (ns)
Min
48
50
0
0
0
0
Max
10
70
20
Mode 2 (ns)
Min
31
50
0
0
0
0
Electrical Characteristics
Max
10
60
20
Device
Connector
Sender
Connector
Host
Connector
See Note 2
Device
Connector
Sender
Connector
Device
Connector
Device
Connector
Sender
Connector
Measuring
Location
Figure
531