FW82801DB S L66K Intel, FW82801DB S L66K Datasheet - Page 416
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FW82801DB S L66K
Manufacturer Part Number
FW82801DB S L66K
Description
Manufacturer
Intel
Datasheet
1.FW82801DB_S_L66K.pdf
(587 pages)
Specifications of FW82801DB S L66K
Lead Free Status / RoHS Status
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USB UHCI Controllers Registers
416
5:4
Bit
6
3
2
1
0
Resume Detect (RSM_DET) — R/W. Software sets this bit to a 1 to drive resume signaling. The
Host controller sets this bit to a 1 if a J-to-K transition is detected for at least 32 microseconds while
the port is in the Suspend state. The ICH4 will then reflect the K-state back onto the bus as long as
the bit remains a 1, and the port is still in the suspend state (bit 12,2 are 11). Writing a 0 (from 1)
causes the port to send a low speed EOP. This bit will remain a 1 until the EOP has completed.
0 = No resume (K-state) detected/driven on port.
1 = Resume detected/driven on port.
Line Status — RO These bits reflect the D+ (bit 4) and D- (bit 5) signals line’s logical levels. These
bits are used for fault detect and recovery as well as for USB diagnostics. This field is updated at
EOF2 time (See Chapter 11 of the USB Specification).
Port Enable/Disable Change — R/WC For the root hub, this bit gets set only when a port is
disabled due to disconnect on that port or due to the appropriate conditions existing at the EOF2
point (See Chapter 11 of the USB Specification).
0 = No change. Software clears this bit by writing a 1 to the bit location.
1 = Port enabled/disabled status has changed.
Port Enabled/Disabled (PORT_EN) — R/W Ports can be enabled by host software only. Ports can
be disabled by either a fault condition (disconnect event or other fault condition) or by host software.
Note that the bit status does not change until the port state actually changes and that there may be
a delay in disabling or enabling a port if there is a transaction currently in progress on the USB.
0 = Disable
1 = Enable..
Connect Status Change — R/WC Indicates that a change has occurred in the port’s Current
Connect Status (see bit 0). The hub device sets this bit for any changes to the port device connect
status, even if system software has not cleared a connect status change. If, for example, the
insertion status changes twice before system software has cleared the changed condition, hub
hardware will be setting” an already-set bit (i.e., the bit will remain set). However, the hub transfers
the change bit only once when the Host controller requests a data transfer to the Status Change
endpoint. System software is responsible for determining state change history in such a case.
0 = No change. Software clears this bit by writing a 1 to the bit location.
1 = Change in Current Connect Status.
Current Connect Status — RO This value reflects the current state of the port, and may not
correspond directly to the event that caused the Connect Status Change bit (Bit 1) to be set.
0 = No device is present.
1 = Device is present on port.
Description
Intel
®
82801DB ICH4 Datasheet
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