M66291GP#201 Renesas Electronics America, M66291GP#201 Datasheet - Page 22

• Manufacturer Part Number: M66291GP#201
• Description: IC USB CONTROLLER GEN-PUR 48LQFP
• Manufacturer: Renesas Electronics America

Specifications of M66291GP#201

• Package / Case: 48-LQFP
• Mounting Type: Surface Mount
• Current - Supply: 30mA
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -20°C ~ 85°C
• Interface: Serial
• Controller Type: USB 2.0 Controller
• Lead Free Status / RoHS Status: Not Compliant

M 6 6 2 9 1 G P / H P
2.8 Interrupt Enable Register 0
R e v 1 . 0 1
VBSE
b15
Interrupt Enable Register 0 (INT_ENABLE0)
15
14
13
12
11
10
0
0
-
b
9
8
7
6
5
4
3
2
1
0
This register sets enable of interrupt and enable/disable of setting DVST and CTRT bits to “1”.
Also refer to “3.1 Interrupt Function”.
2 0 0 4 . 1 1 . 0 1
RSME
VBSE
Vbus Interrupt Enable
RSME
Resume Interrupt Enable
SOFE
SOF Detect Interrupt Enable
DVSE
Device State Transition Interrupt Enable
CTRE
Control Transfer Transition Interrupt Enable
BEMPE
Buffer Empty/Size Over Error Interrupt Enable
INTNE
Buffer Not Ready Interrupt Enable
INTRE
Buffer Ready Interrupt Enable
URST
USB Reset Detect
SADR
SET_ADDRESS Execute
SCFG
SET_CONFIGURATION Execute
SUSP
Suspend Detect
WDST
Control Write Transfer Status Stage
RDST
Control Read Transfer Status Stage
CMPL
Control Transfer Complete
SERR
Control Transfer Sequence Error
14
0
0
-
SOFE
13
0
0
-
p a g e 2 2 o f 1 2 2
DVSE
12
0
0
-
Bit name
CTRE BEMPE INTNE INTRE
11
0
0
-
10
0
0
-
9
0
0
-
0 :
1 :
0 :
1 :
0 :
1 :
0 :
1 :
0 :
1 :
0 :
1 :
0 :
1 :
0 :
1 :
0 :
1 :
0 :
1 :
0 :
1 :
0 :
1 :
0 :
1 :
0 :
1 :
0 :
1 :
0 :
1 :
8
0
0
-
Disable interrupt
Enable interrupt
(Interrupt occurs when VBUS bit is set to “1”)
Disable interrupt
Enable interrupt
(Interrupt occurs when RESM bit is set to "1")
Disable interrupt
Enable interrupt
(Interrupt occurs when SOFR bit is set to "1")
Disable interrupt
Enable interrupt
(Interrupt occurs when DVST bit is set to "1")
Disable interrupt
Enable interrupt
(Interrupt is occurs when CTRT bit is set to "1")
Disable interrupt
Enable interrupt
(Interrupt is occurs when BEMP bit is set to "1")
Disable interrupt
Enable interrupt
(Interrupt occurs when INTN bit is set to "1")
Disable interrupt
Enable interrupt
(Interrupt occurs when INTR bit is set to "1")
Disable DVST bit set
Enable DVST bit set
Disable DVST bit set
Enable DVST bit set
Disable DVST bit set
Enable DVST bit set
Disable DVST bit set
Enable DVST bit set
Disable CTRT bit set
Enable CTRT bit set
Disable CTRT bit set
Enable CTRT bit set
Disable CTRT bit set
Enable CTRT bit set
Disable CTRT bit set
Enable CTRT bit set
URST
7
0
0
-
SADR
6
0
0
-
SCFG
Function
5
0
0
-
SUSP
4
0
0
-
WDST
3
0
0
-
RDST
2
0
0
-
<H/W reset : H'0000>
<S/W reset : H'0000>
<Address : H’10>
<USB bus reset : ->
CMPL
1
0
0
-
R
SERR
b0
0
0
-
W