PSD813F2-A-70J STMicroelectronics, PSD813F2-A-70J Datasheet - Page 104

no-image

PSD813F2-A-70J

Manufacturer Part Number
PSD813F2-A-70J
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of PSD813F2-A-70J

Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Package Type
PLCC
Mounting
Surface Mount
Pin Count
52
Lead Free Status / RoHS Status
Compliant
AC/DC parameters
Table 52.
Table 53.
104/128
t
t
t
f
t
t
t
t
t
t
t
Symbol
Symbol
COA
ARDA
MINA
MAXA
SA
HA
CHA
CLA
COA
ARD
MINA
Clock to
output delay
CPLD array
delay
Minimum
clock period
Maximum
frequency
External
feedback
Maximum
frequency
Internal
feedback
(f
Maximum
frequency
Pipelined data
Input setup time
Input hold time
Clock high time
Clock low time
Clock to output
delay
CPLD array
delay
Minimum clock
period
CNTA
Parameter
Parameter
CPLD macrocell asynchronous clock mode timing (5 V devices) (continued)
CPLD macrocell Asynchronous clock mode timing (3 V devices)
)
Any macrocell
1/(t
Conditions
Any macrocell
1/(t
1/(t
Conditions
1/f
SA
1/f
CHA
SA
CNTA
+t
CNTA
+t
COA
+t
COA
CLA
–10)
)
)
Min
16
Min
10
12
17
13
36
Doc ID 7833 Rev 7
-70
-12
Max
21
11
Max
21.7
27.8
33.3
36
25
Min
28
Min
12
15
22
15
42
-90
-15
Max
30
16
Max
19.2
23.8
27
40
29
Min
39
Min
13
17
25
16
49
-15
-20
Max
Max
16.9
20.4
24.4
37
22
46
33
Aloc
Aloc
+ 4
+ 4
PT
+ 2
PT
Turbo
Turbo
+ 20
+ 20
+ 20
+ 20
+ 10
off
off
Slew
Slew
PSD8XXFX
rate
rate
– 6
– 2
MHz
MHz
MHz
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

Related parts for PSD813F2-A-70J