PSD813F2-A-70J STMicroelectronics, PSD813F2-A-70J Datasheet - Page 76

• Manufacturer Part Number: PSD813F2-A-70J
• Manufacturer: STMicroelectronics

Specifications of PSD813F2-A-70J

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Package Type: PLCC
• Mounting: Surface Mount
• Pin Count: 52
• Lead Free Status / RoHS Status: Compliant

I/O ports
16.21
16.22
76/128
Port C – functionality and structure
Port C can be configured to perform one or more of the following functions (see
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Port C does not support Address Out mode, and therefore no Control register is required.
Pin PC7 may be configured as the DBE input in certain MCU bus interfaces.
Figure 28. Port C structure
Port D – functionality and structure
Port D has three I/O pins. See
Out mode, and therefore no Control register is required. port D can be configured to perform
one or more of the following functions:
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MCU I/O mode
CPLD Output – McellBC7-McellBC0 outputs can be connected to port B or port C.
CPLD input – via the input macrocells (IMC)
Address In – Additional high address inputs using the input macrocells (IMC).
In-system programming (ISP) – JTAG port can be enabled for programming/erase of
the PSD device (see
for more information on JTAG programming).
Open Drain – port C pins can be configured in Open Drain mode
MCU I/O mode
CPLD Output – External Chip Select (ECS0-ECS2)
CPLD input – direct input to the CPLD, no input macrocells (IMC)
Slew rate – pins can be set up for fast slew rate
WR
MCELLBC [ 7:0 ]
WR
ENABLE PRODUCT TERM ( .OE )
CPLD- INPUT
READ MUX
DATA OUT
DIR REG.
D
D
REG.
Section 19: Programming in-circuit using the JTAG serial interface
P
D
B
Q
Q
Figure 29
Doc ID 7833 Rev 7
DATA IN
SPECIAL FUNCTION
and
DATA OUT
Figure
1
30. This port does not support Address
SPECIAL FUNCTION
OUTPUT
OUTPUT
SELECT
MUX
ENABLE OUT
MACROCELL
INPUT
CONFIGURATION
PORT C PIN
PSD8XXFX
Figure
BIT
28):
AI02888B