PSD813F2-A-70J STMicroelectronics, PSD813F2-A-70J Datasheet - Page 69
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PSD813F2-A-70J
Manufacturer Part Number
PSD813F2-A-70J
Description
Manufacturer
STMicroelectronics
Datasheet
1.PSD813F2-A-70J.pdf
(128 pages)
Specifications of PSD813F2-A-70J
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Package Type
PLCC
Mounting
Surface Mount
Pin Count
52
Lead Free Status / RoHS Status
Compliant
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PSD8XXFX
16.3
16.4
16.5
Note:
MCU I/O mode
In the MCU I/O mode, the MCU uses the I/O ports block to expand its own I/O ports. By
setting up the CSIOP space, the ports on the PSD are mapped into the MCU address
space. The addresses of the ports are listed in
A port pin can be put into MCU I/O mode by writing a 0 to the corresponding bit in the
Control register. The MCU I/O direction may be changed by writing to the corresponding bit
in the Direction register, or by the output enable product term (see
I/O
drives the pin. When configured as an input, the MCU can read the port input through the
Data In buffer (see
Ports C and D do not have Control registers, and are in MCU I/O mode by default. They can
be used for PLD I/O if equations are written for them in PSDabel.
PLD I/O mode
The PLD I/O mode uses a port as an input to the CPLD’s input macrocells (IMC), and/or as
an output from the CPLD’s Output macrocells (OMC). The output can be tri-stated with a
control signal. This output enable control signal can be defined by a product term from the
PLD, or by resetting the corresponding bit in the Direction register to ’0.’ The corresponding
bit in the Direction register must not be set to '1' if the pin is defined for a PLD input signal in
PSDabel. The PLD I/O mode is specified in PSDabel by declaring the port pins, and then
writing an equation assigning the PLD I/O to a port.
Address Out mode
For MCUs with a multiplexed address/data bus, Address Out mode can be used to drive
latched addresses on to the port pins. These port pins can, in turn, drive external devices.
Either the output enable or the corresponding bits of both the Direction register and Control
register must be set to a 1 for pins to use Address Out mode. This must be done by the
MCU at run-time. See
various MCUs.
For non-multiplexed 8-bit bus mode, address signals (A7-A0) are available to port B in
Address Out mode.
Do not drive address signals with Address Out mode to an external memory device if it is
intended for the MCU to Boot from the external device. The MCU must first Boot from PSD
memory so the Direction and Control register bits can be set.
Table 20.
MCU I/O
PLD I/O
McellAB outputs
McellBC outputs
Additional Ext. CS outputs
PLD inputs
mode). When the pin is configured as an output, the content of the Data Out register
Port mode
Port operating modes
Figure
Table 22
25).
Port A
Doc ID 7833 Rev 7
for the address output pin assignments on ports A and B for
Yes
Yes
Yes
No
No
Port B
Table
Yes
Yes
Yes
Yes
No
8.
Port C
Yes
Yes
Yes
No
No
Section 16.8: Peripheral
Port D
Yes
Yes
Yes
No
No
I/O ports
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