PSD813F2-A-70J STMicroelectronics, PSD813F2-A-70J Datasheet - Page 60
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PSD813F2-A-70J
Manufacturer Part Number
PSD813F2-A-70J
Description
Manufacturer
STMicroelectronics
Datasheet
1.PSD813F2-A-70J.pdf
(128 pages)
Specifications of PSD813F2-A-70J
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Package Type
PLCC
Mounting
Surface Mount
Pin Count
52
Lead Free Status / RoHS Status
Compliant
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MCU bus interface
15.1
Figure 18. An example of a typical 8-bit multiplexed bus interface
15.2
15.3
60/128
RESET
MCU
PSD interface to a multiplexed 8-bit bus
Figure 18
PSD. The ADIO port on the PSD is connected directly to the MCU address/data bus.
Address Strobe (ALE/AS, PD0) latches the address signals internally. Latched addresses
can be brought out to port A or B. The PSD drives the ADIO data bus only when one of its
internal resources is accessed and Read Strobe (RD, CNTL1) is active. Should the system
address bus exceed sixteen bits, ports A, B, C, or D may be used as additional address
inputs.
PSD interface to a non-multiplexed 8-bit bus
Figure 19
and a PSD. The address bus is connected to the ADIO port, and the data bus is connected
to port A. port A is in tri-state mode when the PSD is not accessed by the MCU. Should the
system address bus exceed sixteen bits, ports B, C, or D may be used for additional address
inputs.
Data Byte Enable reference
MCUs have different data byte orientations.
byte/word operations in different bus WRITE configurations. Even-byte refers to locations
with address A0 equal to '0' and odd byte as locations with A0 equal to ’1.’
BHE
ALE
WR
RD
shows an example of a system using a MCU with an 8-bit multiplexed bus and a
shows an example of a system using a MCU with an 8-bit non-multiplexed bus
AD [ 7:0 ]
A [ 15:8 ]
Doc ID 7833 Rev 7
Table 18
PSD
WR ( CNTRL0 )
RD ( CNTRL1 )
BHE ( CNTRL2 )
RST
ALE ( PD0 )
PORT D
PORT
ADIO
shows how the PSD interprets
PORT
PORT
PORT
A
B
C
( OPTIONAL )
( OPTIONAL )
A [ 7: 0 ]
A [ 15: 8 ]
PSD8XXFX
AI02878C
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