LSISAS1064 LSI, LSISAS1064 Datasheet - Page 14

• Manufacturer Part Number: LSISAS1064
• Manufacturer: LSI

Specifications of LSISAS1064

• Lead Free Status / RoHS Status: Not Compliant

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Contents
Version 3.1
PCI-X Output Signals – REQ/, INTA/, ALT_INTA/
PCI-X Bidirectional Signals – AD[63:0], C_BE[7:0]/,
CPCI_ENUM/, PAR, PAR64, ACK64/, REQ64/, FRAME/,
IRDY/, TRDY/, DEVSEL/, STOP/, PERR/, SERR/
Inputs – ZCR_EN/, CPCI_EN/, TN/, UART_RX
Inputs – CPCI_SWITCH, MODE[5:0], SCAN_ENABLE,
SCAN_MODE
Schmitt Trigger Inputs – TST_RST/, TCK, TRST/, TDI,
TMS, TCK_ICE, TRST_ICE/, TDI_ICE, TMS_ICE
Schmitt Trigger Inputs – REFCLK_B, FSELA
10 mA, 3-State Outputs – CPCI_LED/, HB_LED/,
FAULT_LED[3:0]/, ACTIVE_LED[3:0]/
5 mA, 3-State Outputs – TDO, TDO_ICE, RTCK_ICE
8 mA Outputs – MCLK, ADSC/, ADV/
5 mA Outputs – UART_TX
4 mA Outputs – PROCMON
8 mA Bidirectional Signals – MAD[31:0]
8 mA Bidirectional Signals – MADP[3:0]
8 mA Bidirectional Signals – MOE[1:0]/, MWE[1:0]/,
BWE[3:0]/, NVSRAM_CS/, PSBRAM_CS/, FLASH_CS/
5 mA Bidirectional Signals – SERIAL_CLK,
SERIAL_DATA, ISTWI_CLK, ISTWI_DATA, GPIO[3:0],
TMUX_SPARE[7:0]
PECL Buffer Signals – REFCLK_P, REFCLK_N
Capacitance
External Clock
Reset Input
Interrupt Output
Flash Write Timing Parameters
Flash Read Timing Parameters
NVRAM Read Timing Parameters
NVRAM Write Timing Parameters
Listing by Signal Name
Listing by Pin Number
LSISAS1064 PCI Configuration Space Registers
LSISAS1064 PCI I/O Space Registers
LSISAS1064 PCI Memory [0] Space Registers
Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.
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