LSISAS1064 LSI, LSISAS1064 Datasheet - Page 89

• Manufacturer Part Number: LSISAS1064
• Manufacturer: LSI

Specifications of LSISAS1064

• Lead Free Status / RoHS Status: Not Compliant

Register: 0xXX
MSI Message Control
Read/Write
Table 4.2
PCI Configuration Space Register Description
Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.
0b000
0b001
0b010
0b011
0b100
0b101
0b110
0b111
15
Bits [6:4] Encoding
0
0
0
Multiple Message Enable Field Bit Encoding
0
Reserved
This field is reserved.
Per-Vector Masking Capable
If this bit is set, the device supports MSI per-vector mask-
ing. If this bit is cleared, the function does not support
MSI per-vector masking. This bit is read only.
64-Bit Address Capable
The PCI function sets this read only bit to indicate
support of a 64-bit message address.
Multiple Message Enable
These read/write bits indicate the number of messages
that the host allocates to the LSISAS1064. The host
system software allocates all or a subset of the requested
messages by writing to this field. The number of allocated
request messages must align to a power of two.
provides the bit encoding of this field.
0
Number of Allocated Messages
0
MSI Message Control
0
X
8
Reserved
Reserved
7
1
16
32
1
2
4
8
0
0
0
0
0
Table 4.2
0
[15:9]
[6:4]
4-21
0
0
8
7