DSP56301VF100 Freescale, DSP56301VF100 Datasheet - Page 33

• Manufacturer Part Number: DSP56301VF100
• Manufacturer: Freescale

Specifications of DSP56301VF100

• Device Core Size: 24b
• Format: Fixed Point
• Clock Freq (max): 100MHz
• Mips: 100
• Device Input Clock Speed: 100MHz
• Ram Size: 24KB
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 252
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Not Compliant

2.5.4
Freescale Semiconductor
14
15
16
17
18
19
20
No.
10
11
12
13
8
9
Delay from RESET assertion to all pins at reset value
Required RESET duration
•
•
•
•
•
•
Delay from asynchronous RESET deassertion to first
external address output (internal reset deassertion)
•
•
Synchronous reset setup time from RESET deassertion to
CLKOUT Transition 1
•
•
Synchronous reset deasserted, delay time from the
CLKOUT Transition 1 to the first external address output
•
•
Mode select setup time
Mode select hold time
Minimum edge-triggered interrupt request assertion width
Minimum edge-triggered interrupt request deassertion
width
Delay from IRQA, IRQB, IRQC, IRQD, NMI assertion to
external memory access address out valid
•
•
Delay from IRQA, IRQB, IRQC, IRQD, NMI assertion to
general-purpose transfer output valid caused by first
interrupt instruction execution
Delay from address output valid caused by first interrupt
instruction execute to interrupt request deassertion for
level sensitive fast interrupts
Delay from RD assertion to interrupt request deassertion
for level sensitive fast interrupts
Power on, external clock generator, PLL disabled
Power on, external clock generator, PLL enabled
Power on, internal oscillator
During STOP, XTAL disabled (PCTL Bit 16 = 0)
During STOP, XTAL enabled (PCTL Bit 16 = 1)
During normal operation
Minimum
Maximum
Minimum
Maximum
Minimum
Maximum
Caused by first interrupt instruction fetch
Caused by first interrupt instruction execution
Reset, Stop, Mode Select, and Interrupt Timing
Characteristics
Table 2-7.
4
1
1
Reset, Stop, Mode Select, and Interrupt Timing
DSP56301 Technical Data, Rev. 10
5
3
4.25 × T
7.25 × T
10 × T
80 MHz:
3.75 × T
100 MHz:
3.75 × T
80 MHz:
3.25 × T
100 MHz:
3.25 × T
20.25 × T
C
20.25 T
3.25 × T
3.25 × T
Expression
75000 × ET
75000 × ET
+ 5.0
C
C
C
C
C
C
1000 × ET
50 × ET
+ 2.0
+ 2.0
+ WS × T
+ WS × T
+ WS × T
+ WS × T
2.5 × T
2.5 × T
T
—
C
C
C
C
C
+ 10.0
+ 2.0
+ 1.0
C
C
+ 1.0
C
C
C
C
C
C
C
C
– 12.4
– 10.94
– 12.4
– 10.94
8.25
8.25
55.1
92.6
130.0
—
—
625.0
Min
12.5
31.3
31.3
42.6
41.6
30.0
1.0
1.0
7.4
0.0
—
—
—
—
80 MHz
—
—
—
—
—
Note 8
Note 8
AC Electrical Characteristics
6
263.1
258.1
Max
26.0
12.5
—
—
—
—
—
—
—
—
—
—
—
6.6
7.1
44.5
74.5
105.0
—
—
500.0
Min
10.0
0.75
0.75
25.0
25.0
34.5
33.5
30.0
5.9
0.0
—
—
—
—
100 MHz
—
—
—
—
—
Note 8
Note 8
212.5
207.5
Max
26.0
10.0
—
—
—
—
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
ms
ms
ns
ns
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2-7