ALXD800EEXJ2VC C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VC C3 Datasheet - Page 318

• Manufacturer Part Number: ALXD800EEXJ2VC C3
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJ2VC C3

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

318
Bit
9:8
2:1
7
6
5
4
3
0
Name
DISP_MODE
RSVD
TRUP
RSVD
VDEN
GDEN
RSVD
TGEN
33234H
Description
Display Mode. Bits per pixel.
00: 8-bpp (also used in VGA emulation)
01: 16-bpp
10: 24-bpp (RGB 8:8:8)
11: 32-bpp
Reserved.
Timing Register Update. Effective immediately.
0: Prevent update of working timing registers. This bit should be set low when a new tim-
1: Update working timing registers on next active edge of vertical sync.
Reserved.
Video Data Enable. Set this bit to 1 to allow transfer of video data to the VP.
Graphics Data Enable. Set this bit to 1 to allow transfer of graphics data through the dis-
play pipeline.
Reserved.
Timing Generator Enable. Effective immediately.
0: Disable timing generator.
1: Enable timing generator.
This bit must be set to 0 when using VGA mode unless the filters or VGA Fixed Timings
are also enabled (DC_GENERAL_CFG register, bit 18, DC Memory Offset 004h[18]).
DC_DISPLAY_CFG Bit Descriptions (Continued)
ing set is being programmed, but the display is still running with the previously pro-
grammed timing set.
Display Controller Register Descriptions
AMD Geode™ LX Processors Data Book