ALXD800EEXJ2VC C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VC C3 Datasheet - Page 412

• Manufacturer Part Number: ALXD800EEXJ2VC C3
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJ2VC C3

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

6.8
This section provides information on the registers associ-
ated with the Video Processor: Standard GeodeLink
Device (GLD) and Video Processor Specific MSRs
(accessed via the RDMSR and WRMSR instructions), and
two blocks of functional memory mapped registers (Video
Processor and Flat Panel).
412
Video Processor
48002000h
48002001h
48002002h
48002003h
48002004h
48002005h
48002010h
48002011h
Address
Address
Memory
Offset
MSR
MSR
000h
008h
010h
018h
020h
028h
030h
038h
040h
048h
VP
Video Processor Register Descriptions
Table 6-71. Video Processor Module Configuration Control Registers Summary
Type
Type
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
33234H
Table 6-70. Video Processor Module Specific MSRs Summary
Table 6-69. Standard GeodeLink™ Device MSRs Summary
Register Name
GLD Capabilities MSR (GLD_MSR_CAP)
GLD Master Configuration MSR
(GLD_MSR_CONFIG)
GLD SMI MSR (GLD_MSR_SMI)
GLD Error MSR (GLD_MSR_ERROR)
GLD Power Management MSR
(GLD_MSR_PM)
GLD Diagnostic MSR (GLD_MSR_DIAG)
Register Name
VP Diagnostic MSR (MSR_DIAG_VP)
Pad Select MSR (MSR_PADSEL)
Register Name
Video Configuration (VCFG)
Display Configuration (DCFG)
Video X Position (VX)
Video Y Position (VY)
Video Scale (SCL)
Video Color Key Register (VCK)
Video Color Mask (VCM)
Palette Address (PAR)
Palette Data (PDR)
Saturation Scale (SLR)
Table 6-75 through Table 6-78 are register summary tables
that include reset values and page references where the bit
descriptions are provided.
Note: The MSR address is derived from the perspective
of the CPU Core. See Section 4.1 "MSR Set" on
page 45 for more details on MSR addressing.
For memory offset mapping details, see Section
4.1.3 "Memory and I/O Mapping" on page 47.
00000000_00040E00h
00000000_0013F0xxh
00000000_00000000h
00000000_00000000h
00000000_00000555h
00000002_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_000000xxh
00000000_00xxxxxxh
Reset Value
Reset Value
Reset Value
AMD Geode™ LX Processors Data Book
Video Processor Register Descriptions
Reference
Reference
Reference
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