ALXD800EEXJ2VC C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VC C3 Datasheet - Page 659

• Manufacturer Part Number: ALXD800EEXJ2VC C3
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJ2VC C3

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

Instruction Set
Note 1. All references to TOS and ST(n) refer to stack layout prior to execution. Values popped off the stack are discarded.
AMD Geode™ LX Processors Data Book
windex 1 (imm8)
windex 2 (imm8)
windex 3 (imm8)
windexall (imm8)
msb [bytes]
msb [words]
trun
n
TOS (Note 1)
ST(1) (Note 1)
ST(n) (Note 1)
M.WI
M.SI
M.LI
M.SR
M.DR
M.XR
M.BCD
CC
Env Regs
Abbreviation
A POP from the stack increments the top of the stack pointer. A PUSH to the stack decrements the top of the stack
pointer.
Table 8-27. MMX™, FPU, and AMD 3DNow!™ Instruction Set Table Legend
Description
The range given by [index1 (imm8) + 15: index1 (imm8)].
The range given by [index2 (imm8) + 15: index2 (imm8)].
The range given by [index3 (imm8) r15: indes3 (imm8)].
The four different index # (imm8) ordered in the same way as word.
The most significant bits of the different eight bytes in QWORD, ordered from higher to lower
bytes.
The most significant bits (sign bit) of the different four WORDs in a QWORD ordered from higher
to lower.
If required, the resultant data is truncated to remain within the associated range.
Stack register number.
Top of stack register pointed to by SSS in the status register.
FPU register next to TOS.
A specific FPU register, relative to TOS.
16-bit integer operand from memory.
32-bit integer operand from memory.
64-bit integer operand from memory.
32-bit real operand from memory.
64-bit real operand from memory.
80-bit real operand from memory.
18-digit BCD integer operand from memory.
FPU condition code.
Status, Mode Control and Tag registers, Instruction Pointer and Operand Pointer.
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