ALXD800EEXJ2VC C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VC C3 Datasheet - Page 527
ALXD800EEXJ2VC C3
Manufacturer Part Number
ALXD800EEXJ2VC C3
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.ALXD800EEXJ2VC_C3.pdf
(680 pages)
Specifications of ALXD800EEXJ2VC C3
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
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Security Block Register Descriptions
6.12.3.13 SB Writable Key 3 (SB_WKEY_3)
SB Memory Offset 03Ch
Type
Reset Value
6.12.3.14 SB CBC Initialization Vector 0 (SB_CBC_IV_0)
SB Memory Offset 040h
Type
Reset Value
AMD Geode™ LX Processors Data Book
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31:0
31:0
Bit
Bit
Name
Writable Key 3
Name
CBC_IV_0
[31:0]
WO
00000000h
R/W
00000000h
Description
Writable Key 3. Bits [127:96] of the Writable Key for the Security Block. This register
should not be changed during an AES encryption or decryption operation. To prevent
one process from reading the key written by another process, this register is not read-
able.
Description
CBC Initialization Vector 0 [31:0]. Bits [31:0] of the initialization vector (IV) for the CBC
AES mode (Cipher Block Chaining). Change this register only when both A and B chan-
nels are IDLE. (A and B start bits, SB Memory Offset 000h and 004h, bit 0 = 0). This reg-
ister must be programmed with the IV vector prior to starting an AES CBC mode
encryption or decryption.
SB_CBC_IV_0 Bit Descriptions
SB_WKEY_3 Bit Descriptions
SB_CBC_IV_0 Register Map
SB_WKEY_3 Register Map
WKEY_3[127:96]
CBC_IV_0[31:0]
9
9
8
8
33234H
7
7
6
6
5
5
4
4
3
3
2
2
1
1
527
0
0
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