KC80526LY400128 Intel, KC80526LY400128 Datasheet - Page 14

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KC80526LY400128

Manufacturer Part Number
KC80526LY400128
Description
Manufacturer
Intel
Datasheet

Specifications of KC80526LY400128

Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant

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3.1.7
Table 7 lists the voltage signal definitions.
3.1.8
Table 8 lists the JTAG signals, which the system electronics
can use to implement a JTAG chain and ITP port, if desired.
The JTAG signals provided can not be used as an ITP port.
DBREST# (reset target system) on the ITP debug port can be “logically ANDed” with VR_PWRGD TO PIIX4E/M’s PWROK.
V_DC
V_3S
V_5
V_3
V_CPUIO
TDO
TDI
TMS
TCLK
TRST#
ITP(1:0)
ITP1
ITP0
Name
Name
Voltages (39 Signals)
JTAG (7 Signals)
Type
NOTE:
O
I
I
I
I
Type
O
O
I
I
I
I
I
Number
of Pins
10
20
1
5
3
V_CPUIO
V_CPUIO
V_CPUIO
V_CPUIO
V_CPUIO
V_CPUIO
Voltage
DC Input: 5V-21V.
SUSB# controlled 3.3V: V_3S is supplied by the system electronics. This is a 3.3-V power
supply that is turned off during suspend during system states STR, STD, and Soff.
SUSC# controlled 5V: Power managed 5.0-V supply. An output of the voltage regulator on
the system electronics. This rail is off during STD and Soff.
SUSC# controlled 3.3V: Power managed 3.3-V supply. An output of the voltage regulator on
the system electronics. This rail is off during STD and Soff.
Processor I/O Ring: Powers the processor interface signals such as the PIIX4E/M open-drain
pullups for the processor/PIIX4E/M sideband signals and the CKDM66-M clock source.
JTAG Test Data Out: Serial output port. TAP instructions and data is shifted out of the
processor from this port.
JTAG Test Data In: Serial input port. TAP instructions and data is shifted into the
processor from this port.
JTAG Test Mode Select: Controls the TAP controller change sequence.
JTAG Test Clock: Testability clock for clocking the JTAG boundary scan sequence.
JTAG Test Reset: Asynchronously resets the TAP controller in the processor.
Debug Port Signals: These signals are not used in the Celeron processor mobile
module MMC-1and should not be connected.
Table 7. Voltage Descriptions
Table 8. JTAG Pins
Intel Celeron
Description
At 400 MHz, 366 MHz, 333 MHz, and 300 MHz
Description
Processor Mobile Module MMC-1
14

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