82V3380PFG IDT, Integrated Device Technology Inc, 82V3380PFG Datasheet - Page 32

82V3380PFG

Manufacturer Part Number
82V3380PFG
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of 82V3380PFG

Function
Wan PLL
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Package Type
TQFP
Pin Count
100
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
Functional Description
IDT82V3380
Notes to
1. Reset.
2. An input clock is selected.
3. The T0 selected input clock is disqualified AND No qualified input clock is available.
4. The T0 selected input clock is switched to another one.
5. The T0 selected input clock is locked (the T0_DPLL_LOCK bit is ‘1’).
6. The T0 selected input clock is disqualified AND No qualified input clock is available.
7. The T0 selected input clock is unlocked (the T0_DPLL_LOCK bit is ‘0’).
8. The T0 selected input clock is locked again (the T0_DPLL_LOCK bit is ‘1’).
9. The T0 selected input clock is switched to another one.
10. The T0 selected input clock is locked (the T0_DPLL_LOCK bit is ‘1’).
11. The T0 selected input clock is disqualified AND No qualified input clock is available.
12. The T0 selected input clock is switched to another one.
13. The T0 selected input clock is disqualified AND No qualified input clock is available.
14. An input clock is selected.
15. The T0 selected input clock is switched to another one.
Figure
7:
Figure 7. T0 Selected Input Clock vs. DPLL Automatic Operating Mode
15
Pre-Locked2
mode
4
10
Pre-Locked
mode
9
12
1
3
5
8
Lost-Phase
32
Locked
mode
mode
Free-Run mode
2
7
13
11
6
14
SYNCHRONOUS ETHERNET WAN PLL
Holdover
mode
May 19, 2009

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