82V3380PFG IDT, Integrated Device Technology Inc, 82V3380PFG Datasheet - Page 72

82V3380PFG

Manufacturer Part Number
82V3380PFG
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of 82V3380PFG

Function
Wan PLL
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Package Type
TQFP
Pin Count
100
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
DIFFERENTIAL_IN_OUT_OSCI_CNFG - Differential Input / Output Port & Master Clock Configuration
Programming Information
IDT82V3380
Address: 0AH
Type: Read / Write
Default Value: XXXXX001
7 - 3
Bit
2
1
0
7
-
OUT7_PECL_LVDS
OUT6_PECL_LVDS
OSC_EDGE
Name
-
6
-
Reserved.
This bit selects a better active edge of the master clock.
0: The rising edge. (default)
1: The falling edge.
This bit selects a port technology for OUT7.
0: LVDS. (default)
1: PECL.
This bit selects a port technology for OUT6.
0: LVDS.
1: PECL. (default)
5
-
4
-
72
3
-
Description
OSC_EDGE
2
SYNCHRONOUS ETHERNET WAN PLL
OUT7_PECL_LVDS
1
OUT6_PECL_LVDS
May 19, 2009
0

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