82V3380PFG IDT, Integrated Device Technology Inc, 82V3380PFG Datasheet - Page 74
82V3380PFG
Manufacturer Part Number
82V3380PFG
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.82V3380PFG.pdf
(175 pages)
Specifications of 82V3380PFG
Function
Wan PLL
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Package Type
TQFP
Pin Count
100
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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MS_SL_CTRL_CNFG - Master Slave Control
PROTECTION_CNFG - Register Protection Mode Configuration
Programming Information
IDT82V3380
Address: 13H
Type: Read / Write
Default Value: XXXXXXX0
Address: 7EH
Type: Read / Write
Default Value: 10000101
PROTECTION_
7 - 0
Bit
7-1
Bit
0
DATA7
7
7
-
PROTECTION_DATA[7:0]
MS_SL_CTRL
PROTECTION_
Name
Name
-
DATA6
6
6
-
Reserved.
These bits, together with the MS/SL pin, control whether the device is configured as the Master or as the Slave.
The default value of this bit is ‘0’.
PROTECTION_
These bits select a register write protection mode.
00000000 - 10000100, 10000111 - 11111111: Protected mode. No other registers can be written except this register.
10000101: Fully Unprotected mode. All the writable registers can be written. (default)
10000110: Single Unprotected mode. One more register can be written besides this register. After write operation (not
including writing a ‘1’ to clear the bit to ‘0’), the device automatically switches to Protected mode.
MS/ SL pin
DATA5
High
Low
5
5
-
Master/Slave Control
PROTECTION_
DATA4
MS_SL_CTRL Bit
4
4
-
0
1
0
1
74
PROTECTION_
DATA3
3
3
-
Description
Description
PROTECTION_
DATA2
Result
Master
Master
Slave
Slave
2
2
-
SYNCHRONOUS ETHERNET WAN PLL
PROTECTION_
DATA1
1
1
-
PROTECTION_
MS_SL_CTRL
May 19, 2009
DATA0
0
0
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