SSTU32866EC-S NXP Semiconductors, SSTU32866EC-S Datasheet - Page 15
![](/photos/31/41/314104/sot536-1_sml.jpg)
SSTU32866EC-S
Manufacturer Part Number
SSTU32866EC-S
Description
Manufacturer
NXP Semiconductors
Datasheet
1.SSTU32866EC-S.pdf
(29 pages)
Specifications of SSTU32866EC-S
Logic Family
SSTU
Logical Function
Registered Buffer
Number Of Elements
1
Number Of Bits
25
Number Of Inputs
25
Number Of Outputs
25
High Level Output Current
-8mA
Low Level Output Current
8mA
Package Type
LFBGA
Propagation Delay Time
3ns
Operating Supply Voltage (typ)
1.8V
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Clock-edge Trigger Type
Posit/Negat-Edge
Polarity
Non-Inverting
Technology
CMOS
Frequency (max)
450(Min)MHz
Mounting
Surface Mount
Pin Count
96
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Not Compliant
Philips Semiconductors
9397 750 14181
Product data sheet
Fig 8. Timing diagram for the first SSTU32866 (1:2 Register A configuration) device used in pair; C0 = 0, C1 = 1
(not used)
RESET
PAR_IN
QERR
DCS
CSR
PPO
D14
Q14
CK
CK
Q1
D1
to
to
CK to Q
t
PD
t
su
m
t
h
CK to QERR
CK to PPO
Rev. 02 — 11 November 2004
t
t
t
su
PD
PD
m + 1
t
h
1.8 V DDR2 configurable registered buffer with parity
m + 2
CK to QERR
t
PD
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
m + 3
SSTU32866
m + 4
002aaa656
15 of 29