SSTU32866EC-S NXP Semiconductors, SSTU32866EC-S Datasheet - Page 21
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SSTU32866EC-S
Manufacturer Part Number
SSTU32866EC-S
Description
Manufacturer
NXP Semiconductors
Datasheet
1.SSTU32866EC-S.pdf
(29 pages)
Specifications of SSTU32866EC-S
Logic Family
SSTU
Logical Function
Registered Buffer
Number Of Elements
1
Number Of Bits
25
Number Of Inputs
25
Number Of Outputs
25
High Level Output Current
-8mA
Low Level Output Current
8mA
Package Type
LFBGA
Propagation Delay Time
3ns
Operating Supply Voltage (typ)
1.8V
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Clock-edge Trigger Type
Posit/Negat-Edge
Polarity
Non-Inverting
Technology
CMOS
Frequency (max)
450(Min)MHz
Mounting
Surface Mount
Pin Count
96
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Not Compliant
Philips Semiconductors
9397 750 14181
Product data sheet
11.4 Partial Parity Out load circuit and voltage measurement information
V
All input pulses are supplied by generators having the following characteristics:
PRR
Fig 23. Voltage waveforms, open-drain output LOW-to-HIGH transition time with respect to
Fig 24. Partial Parity Out load circuit
Fig 25. Partial Parity Out voltage waveforms; propagation delay times with respect to
DD
= 1.8 V
(1) C
10 MHz; Z
clock inputs
V
t
V
clock inputs
PLH
TT
i(p-p)
L
includes probe and jig capacitance.
= V
and t
= 600 mV
0.1 V.
DD
PHL
/2
0
waveform 2
= 50 ; input slew rate = 1 V/ns
are the same as t
CK
CK
Rev. 02 — 11 November 2004
output
timing
inputs
output
DUT
t
V
1.8 V DDR2 configurable registered buffer with parity
PLH
OUT
PD
ICR
.
V
t
LH
ICR
C
0.15 V
L
= 5 pF
(1)
V
ICR
20 %, unless otherwise specified.
t
V
V
PHL
TT
ICR
test point
R
002aaa375
002aaa654
L
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
002aaa503
= 1 k
V
i(p-p)
SSTU32866
V
V
V
0 V
OH
OL
V
OH
i(p-p)
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