SSTU32866EC-S NXP Semiconductors, SSTU32866EC-S Datasheet - Page 19
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SSTU32866EC-S
Manufacturer Part Number
SSTU32866EC-S
Description
Manufacturer
NXP Semiconductors
Datasheet
1.SSTU32866EC-S.pdf
(29 pages)
Specifications of SSTU32866EC-S
Logic Family
SSTU
Logical Function
Registered Buffer
Number Of Elements
1
Number Of Bits
25
Number Of Inputs
25
Number Of Outputs
25
High Level Output Current
-8mA
Low Level Output Current
8mA
Package Type
LFBGA
Propagation Delay Time
3ns
Operating Supply Voltage (typ)
1.8V
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Clock-edge Trigger Type
Posit/Negat-Edge
Polarity
Non-Inverting
Technology
CMOS
Frequency (max)
450(Min)MHz
Mounting
Surface Mount
Pin Count
96
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Not Compliant
Philips Semiconductors
9397 750 14181
Product data sheet
11.2 Data output slew rate measurement information
V
All input pulses are supplied by generators having the following characteristics:
PRR
Fig 16. Load circuit, HIGH-to-LOW slew measurement
Fig 17. Voltage waveforms, HIGH-to-LOW slew rate measurement
Fig 18. Load circuit, LOW-to-HIGH slew measurement
Fig 19. Voltage waveforms, LOW-to-HIGH slew rate measurement
DD
= 1.8 V
(1) C
(1) C
10 MHz; Z
L
L
includes probe and jig capacitance.
includes probe and jig capacitance.
0.1 V.
output
output
0
= 50 ; input slew rate = 1 V/ns
Rev. 02 — 11 November 2004
dv_r
dv_f
DUT
DUT
1.8 V DDR2 configurable registered buffer with parity
OUT
OUT
C
20 %
L
dt_r
= 10 pF
C
L
(1)
80 %
dt_f
80 %
= 10 pF
(1)
20 %, unless otherwise specified.
20 %
V
DD
R
test point
test point
R
002aaa379
002aaa377
L
L
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
= 50
= 50
002aaa380
002aaa378
SSTU32866
V
V
V
V
OL
OH
OL
OH
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