LMK04031BISQ National Semiconductor, LMK04031BISQ Datasheet - Page 28

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LMK04031BISQ

Manufacturer Part Number
LMK04031BISQ
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of LMK04031BISQ

Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Pin Count
48
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant

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15.5.5 Digital Lock Detect 1 Bypass
The VCO coarse tuning algorithm requires a stable OSCin
clock (reference clock to PLL2) to frequency calibrate the in-
ternal VCO correctly. In order to ensure a stable OSCin clock,
the first PLL must achieve lock status. A digital lock detect is
used in PLL1 to monitor its lock status. After lock is achieved
by PLL1, the coarse tuning circuitry is enabled and frequency
calibration for the internal VCO begins.
28
The (DLD_BYP) pin is provided to allow an external bypass
cap to be connected to the digital lock detect 1. This capacitor
will eliminate potential glitches at initial startup of PLL1 due to
unknown phase relationships between the Ncntr1 and Rcntr1.
15.5.6 Bias
Proper bypassing of this pin by a 1 µF capacitor connected to
V
CC
is important for low noise performance.

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