LMK04031BISQ National Semiconductor, LMK04031BISQ Datasheet - Page 48

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LMK04031BISQ

Manufacturer Part Number
LMK04031BISQ
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of LMK04031BISQ

Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Pin Count
48
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant

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Some LVDS receivers may have internal biasing on the in-
puts. In this case, the circuit shown in
by replacing the 50 Ω terminations to Vbias with a single 100
Ω resistor across the input pins of the receiver, as shown in
Figure
may be a startup delay observed in the clock output due to
capacitor charging. The previous figures employ a 0.1 µF ca-
pacitor. This value may need to be adjusted to meet the
startup requirements for a particular application.
FIGURE 12. LVDS Termination for a Self-Biased Receiver
LVPECL drivers require a DC path to ground. When AC cou-
pling an LVPECL signal use 120 Ω emitter resistors close to
the LVPECL driver to provide a DC path to ground as shown
in
be biased to the DC bias level (common mode voltage) spec-
ified by the receiver. The typical DC bias voltage for LVPECL
receivers is 2 V. A Thevenin equivalent circuit (82 Ω resistor
connected to V
with the driver connected to the junction of the 82 Ω and 120
Ω resistors) is a valid termination as shown in
V
DC coupled example in
FIGURE 13. Differential LVPECL Operation, AC Coupling,
17.8.3 Termination for Single-Ended Operation
A balun can be used with either LVDS or LVPECL drivers to
convert the balanced, differential signal into an unbalanced,
single-ended signal.
FIGURE 11. Differential LVDS Operation, AC Coupling,
Thevenin Equivalent, External Biasing at the Receiver
CC
Figure
= 3.3 V. Note this Thevenin circuit is different from the
12. When using AC coupling with LVDS outputs, there
13. For proper receiver operation, the signal should
External Biasing at the Receiver
CC
and a 120 Ω resistor connected to ground
Figure
10.
Figure 11
Figure 13
is modified
30027182
30027119
30027117
for
48
It is possible to use an LVPECL driver as one or two separate
800 mVpp signals. When using only one LVPECL driver of a
CLKoutX/CLKoutX* pair, be sure to properly terminated the
unused driver. When DC coupling one of the LMK04000 fam-
ily clock LVPECL drivers, the termination should be 50 Ω to
V
circuit is also a valid termination as shown in
= 3.3 V.
When AC coupling an LVPECL driver use a 120 Ω emitter
resistor to provide a DC path to ground and ensure a 50 Ω
termination with the proper DC bias level for the receiver. The
typical DC bias voltage for LVPECL receivers is 2 V (See
Section 17.9.2 Driving CLKin Pins with a Single-Ended
Source). If the companion driver is not used it should be ter-
minated with either a proper AC or DC termination. This latter
example of AC coupling a single-ended LVPECL signal can
be used to measure single-ended LVPECL performance us-
ing a spectrum analyzer or phase noise analyzer. When using
most RF test equipment no DC bias point (0 VDC) is required
for safe and proper operation. The internal 50 Ω termination
of the test equipment correctly terminates the LVPECL driver
being measured as shown in
CC
FIGURE 14. Single-Ended LVPECL Operation, DC
FIGURE 15. Single-Ended LVPECL Operation, DC
FIGURE 16. Single-Ended LVPECL Operation, AC
- 2 V as shown in
Coupling, Thevenin Equivalent
Figure
Coupling
Coupling
Figure
14. The Thevenin equivalent
16.
Figure 15
30027116
30027114
30027115
for Vcc

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