MAX1196ECM+D Maxim Integrated Products, MAX1196ECM+D Datasheet - Page 5

IC ADC 8BIT 40MSPS DL 48-TQFP

MAX1196ECM+D

Manufacturer Part Number
MAX1196ECM+D
Description
IC ADC 8BIT 40MSPS DL 48-TQFP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX1196ECM+D

Number Of Bits
8
Sampling Rate (per Second)
40M
Data Interface
Parallel
Number Of Converters
2
Power Dissipation (max)
108mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-TQFP Exposed Pad, 48-eTQFP, 48-HTQFP, 48-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ELECTRICAL CHARACTERISTICS (continued)
(V
resistor, V
unless otherwise noted. ≥+25°C guaranteed by production test, <+25°C guaranteed by design and characterization. Typical values
are at T
Input Hysteresis
Input Leakage
Input Capacitance
DIGITAL OUTPUTS (D0A/B–D7A/B, A/B)
Output Voltage Low
Output Voltage High
Three-State Leakage Current
Three-State Output Capacitance
POWER REQUIREMENTS
Analog Supply Voltage Range
Output Supply Voltage Range
Analog Supply Current
Output Supply Current
Analog Power Dissipation
Power-Supply Rejection
TIMING CHARACTERISTICS
CLK Rise to CHA Output Data
Valid
CLK Fall to CHB Output Data
Valid
Clock Rise/Fall to A/B Rise/Fall
Time
OE Fall to Output Enable Time
OE Rise to Output Disable Time
CLK Pulse Width High
Internal Reference and Multiplexed Parallel Outputs
DD
= OV
A
Dual 8-Bit, 40Msps, 3V, Low-Power ADC with
= +25°C.)
IN
DD
PARAMETER
= 2V
= 3V, 0.1µF and 2.2µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a 10kΩ
P-P
_______________________________________________________________________________________
(differential with respect to COM), C
SYMBOL
t
t
DISABLE
ENABLE
V
PDISS
OV
I
I
C
PSRR
t
OVDD
t
t
V
LEAK
I
V
V
C
DA/B
HYST
DOA
DOB
t
VDD
I
I
OUT
CH
OH
IH
DD
IL
OL
IN
DD
V
V
I
I
OE = OV
OE = OV
Operating, f
applied to both channels
Sleep mode
Shutdown, clock idle, PD = OE = OV
Operating, f
applied to both channels (Note 6)
Sleep mode
Shutdown, clock idle, PD = OE = OV
Operating, f
applied to both channels
Sleep mode
Shutdown, clock idle, PD = OE = OV
Offset, V
Gain, V
C
C
Clock period: 25ns (Note 7)
SINK
SOURCE
IH
IL
L
L
= 20pF (Notes 1, 7)
= 20pF (Notes 1, 7)
= 0
= V
= -200µA
DD
DD
DD
DD
DD
= 200µA
L
= OV
±5%
= 10pF at digital outputs (Note 5), f
INA&B
INA&B
INA&B
±5%
CONDITIONS
DD
= 20MHz at -1dB FS
= 20MHz at -1dB FS
= 20MHz at -1dB FS
DD
DD
DD
OV
MIN
CLK
0.2
2.7
1.7
DD
= 40MHz, T
-
TYP
0.15
12.5
±1.5
0.1
0.3
29
87
±3
±3
5
5
3
3
3
8
3
3
9
6
6
6
5
5
A
MAX
8.25
8.25
= T
±20
±20
±10
108
0.2
3.6
3.6
36
20
10
60
MIN
to T
UNITS
mV/V
mW
mA
mA
µW
µA
pF
µA
pF
µA
µA
ns
ns
ns
ns
ns
ns
V
V
V
V
V
MAX
5
,

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