LTC1418IG Linear Technology, LTC1418IG Datasheet - Page 14

• Manufacturer Part Number: LTC1418IG
• Description: IC A/D CONV 14BIT SRL&PAR 28SSOP
• Manufacturer: Linear Technology

Specifications of LTC1418IG

• Number Of Bits: 14
• Sampling Rate (per Second): 200k
• Data Interface: Serial, Parallel
• Number Of Converters: 1
• Power Dissipation (max): 21.5mW Unipolar; 31.5mW Bipolar
• Voltage Supply Source: Dual ±
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-SSOP (0.200", 5.30mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

LTC1418
APPLICATIONS
error adjustment is achieved by adjusting the offset
applied to the A
– 125 V (i.e., – 0.5LSB) at A
at the A
0000 0000 0000 00 and 1111 1111 1111 11. For
full-scale adjustment, an input voltage of 2.047625V
(FS – 1.5LSBs) is applied to A
the output code flickers between 0111 1111 1111 10 and
0111 1111 1111 11.
BOARD LAYOUT AND GROUNDING
Wire wrap boards are not recommended for high resolu-
tion or high speed A/D converters. To obtain the best
performance from the LTC1418, a printed circuit board
with ground plane is required. The ground plane under the
ADC area should be as free of breaks and holes as
possible, such that a low impedance path between all ADC
grounds and all ADC decoupling capacitors is provided. It
is critical to prevent digital noise from being coupled to the
analog input, reference or analog power supply lines.
Layout should ensure that digital and analog signal lines
are separated as much as possible. In particular, care
should be taken not to run any digital track alongside an
analog signal track.
An analog ground plane separate from the logic system
ground should be established under and around the ADC.
Pin 5 (AGND) and Pin 14 (DGND) and all other analog
grounds should be connected to this single analog ground
plane. The REFCOMP bypass capacitor and the V
pass capacitor should also be connected to this analog
ground plane. No other digital grounds should be con-
14
IN
–
input until the output code flickers between
IN
–
U
CIRCUITRY
ANALOG
input. For zero offset error apply
INPUT
INFORMATION
U
+
–
1
IN
IN
A
+
IN
+
and R2 is adjusted until
+
2
A
and adjust the offset
IN
W
–
V
REF
Figure 11. Power Supply Grounding Practice
3
1 F
ANALOG GROUND PLANE
REFCOMP
U
4
10 F
DD
AGND
by-
LTC1418
5
nected to this analog ground plane. Low impedance ana-
log and digital power supply common returns are essential
to low noise operation of the ADC and the foil width for
these tracks should be as wide as possible. In applications
where the ADC data outputs and control signals are
connected to a continuously active microprocessor bus, it
is possible to get errors in the conversion results. These
errors are due to feedthrough from the microprocessor to
the successive approximation comparator. The problem
can be eliminated by forcing the microprocessor into a
wait state during conversion or by using three-state buff-
ers to isolate the ADC data bus. The traces connecting the
pins and bypass capacitors must be kept short and should
be made as wide as possible.
The LTC1418 has differential inputs to minimize noise
coupling. Common mode noise on the A
will be rejected by the input CMRR. The A
used as a ground sense for the A
hold and convert the difference voltage between A
A
kept as short as possible. In applications where this is not
possible, the A
side to equalize coupling.
SUPPLY BYPASSING
High quality, low series resistance ceramic, 10 F bypass
capacitors should be used at the V
Surface mount ceramic capacitors such as Murata
GRM235Y5V106Z016 provide excellent bypassing in a
small board space. Alternatively 10 F tantalum capacitors
in parallel with 0.1 F ceramic capacitors can be used.
V
SS
IN
27
–
10 F
. The leads to A
V
DD
28
10 F
IN
DGND
+
14
and A
1418 F11
IN
+
(Pin 1) and A
IN
–
traces should be run side by
SYSTEM
DIGITAL
IN
+
DD
input; the LTC1418 will
IN
and REFCOMP pins.
–
IN
(Pin 2) should be
+
IN
and A
–
input can be
IN
IN
–
leads
+
and