DAC1005D650HW/C1,5 NXP Semiconductors, DAC1005D650HW/C1,5 Datasheet - Page 27

• Manufacturer Part Number: DAC1005D650HW/C1,5
• Description: IC DAC 10BIT 650MSPS DL 100HTQFP
• Manufacturer: NXP Semiconductors

Specifications of DAC1005D650HW/C1,5

• Settling Time: 20ns
• Number Of Bits: 10
• Data Interface: SPI™
• Number Of Converters: 2
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 1.4W
• Operating Temperature: -45°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP Exposed Pad, 100-eTQFP, 100-HTQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935286776518

NXP Semiconductors
DAC1005D650
Product data sheet
10.10.1 Regulation
10.10 Full-scale current
10.9 DAC transfer function
Table 34.
[1]
The full-scale output current for each DAC is the sum of the two complementary current
outputs:
The output current depends on the digital input data:
The setting applied to CODING (register 00h[2]; see
defines whether the DAC1005D650 operates with a binary input or a two’s complement
input.
Table 35 “DAC transfer function”
when I
Table 35.
The DAC1005D650 reference circuitry integrates an internal bandgap reference voltage
which delivers a 1.25 V reference to the GAPOUT pin. It is recommended to decouple pin
GAPOUT using a 100 nF capacitor.
First interpolation filter
Lower
H(1)
H(2)
H(3)
H(4)
H(5)
Data
(Decimal)
0
...
512
...
1023
I
I
I
IOUTP
IOUTN
O fs
( )
H(n) is the digital filter coefficient.
=
O(fs)
=
=
I
IOUTP
I
I
Inversion filter coefficients
DAC transfer function
= 20 mA.
O fs
O fs
I9/Q9 to I0/Q0
Binary
00 0000 0000
...
10 0000 0000
...
11 1111 1111
( )
( )
All information provided in this document is subject to legal disclaimers.
×
+
×
⎛
⎝
I
⎛
⎝
IOUTN
DATA
--------------- -
1023 DATA
--------------------------------- -
1023
Rev. 2 — 3 September 2010
[1]
1023
–
⎞
⎠
Dual 10-bit DAC, up to 650 Msps; 2× 4× and 8× interpolating
Upper
H(9)
H(8)
H(7)
H(6)
-
⎞
⎠
shows the output current as a function of the input data,
Two’s complement
10 0000 0000
...
00 0000 0000
...
01 1111 1111
Table 9 “Register allocation
DAC1005D650
Value
2
−4
10
−35
401
IOUTP
0 mA
...
10 mA
...
20 mA
© NXP B.V. 2010. All rights reserved.
IOUTN
20 mA
...
10 mA
...
0 mA
map”)
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(3)
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